arm64: dts: imx8mp-somdevices.dtsi: Add support for ethernet phys.

Signed-off-by: Josep Orga <jorga@somdevices.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-somdevices.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-somdevices.dtsi
index e7ab5f6..35c28f1 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-somdevices.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-somdevices.dtsi
@@ -182,6 +182,11 @@
        pinctrl-0 = <&pinctrl_eqos>;
        phy-mode = "rgmii-id";
        phy-handle = <&ethphy0>;
+       phy-reset-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>;
+       phy-reset-post-delay = <150>;
+       phy-reset-duration = <10>;
+       phy-reset-in-suspend;
+       fsl,magic-packet;
        status = "okay";
 
        mdio {
@@ -189,12 +194,9 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               ethphy0: ethernet-phy@1 {
+               ethphy0: ethernet-phy@4 {
                        compatible = "ethernet-phy-ieee802.3-c22";
-                       reg = <1>;
-                       eee-broken-1000t;
-                       rtl821x,aldps-disable;
-                       rtl821x,clkout-disable;
+                       reg = <4>;
                };
        };
 };
@@ -204,6 +206,10 @@
        pinctrl-0 = <&pinctrl_fec>;
        phy-mode = "rgmii-id";
        phy-handle = <&ethphy1>;
+       phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
+       phy-reset-post-delay = <150>;
+       phy-reset-duration = <10>;
+       phy-reset-in-suspend;
        fsl,magic-packet;
        status = "okay";
 
@@ -211,11 +217,9 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               ethphy1: ethernet-phy@1 {
+               ethphy1: ethernet-phy@4 {
                        compatible = "ethernet-phy-ieee802.3-c22";
-                       reg = <1>;
-                       eee-broken-1000t;
-                       rtl821x,clkout-disable;
+                       reg = <4>;
                };
        };
 };
@@ -658,7 +662,7 @@
                        MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3       0x1f
                        MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f
                        MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK       0x1f
-                       MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22               0x19
+                       MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01               0x19
                >;
        };