MLK-16989-4 ARM64: dts: imx8mq: remove '_drm' postfix for all display nodes

Since the display subsystem is using DRM framework by
default, it is unnecessary to keep '_drm' postfix in
the device node names anymore to indicate that they
are DRM devices.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts
index 81ee650..4739883 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts
@@ -28,11 +28,11 @@
        status = "disabled";
 };
 
-&dcss_drm {
+&dcss {
        status = "disabled";
 };
 
-&hdmi_drm {
+&hdmi {
        status = "disabled";
 };
 
@@ -40,7 +40,7 @@
        status = "disabled";
 };
 
-&lcdif_drm {
+&lcdif {
        status = "okay";
 
        port@0 {
@@ -65,11 +65,11 @@
        };
 };
 
-&mipi_dsi_phy_drm {
+&mipi_dsi_phy {
        status = "okay";
 };
 
-&mipi_dsi_drm {
+&mipi_dsi {
        status = "okay";
        as_bridge;
 
@@ -80,7 +80,7 @@
        };
 };
 
-&mipi_dsi_bridge_drm {
+&mipi_dsi_bridge {
        status = "okay";
 
        port@1 {

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-rm67191.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-rm67191.dts
index 1ae7d2b..72c7530 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-rm67191.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-rm67191.dts
@@ -24,11 +24,11 @@
        status = "disabled";
 };
 
-&dcss_drm {
+&dcss {
        status = "disabled";
 };
 
-&hdmi_drm {
+&hdmi {
        status = "disabled";
 };
 
@@ -36,7 +36,7 @@
        status = "disabled";
 };
 
-&lcdif_drm {
+&lcdif {
        status = "okay";
 
        assigned-clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL_SRC>,
@@ -55,11 +55,11 @@
        };
 };
 
-&mipi_dsi_phy_drm {
+&mipi_dsi_phy {
        status = "okay";
 };
 
-&mipi_dsi_drm {
+&mipi_dsi {
        status = "okay";
        as_bridge;
        assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF_SRC>,
@@ -81,7 +81,7 @@
        };
 };
 
-&mipi_dsi_bridge_drm {
+&mipi_dsi_bridge {
        status = "okay";
 
        panel@0 {

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts
index 1643915..32858e7 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts
@@ -710,7 +710,7 @@
        dc-supply = <&reg_gpio_dvfs>;
 };
 
-&dcss_drm {
+&dcss {
        status = "okay";
 
        disp-dev = "hdmi_disp";
@@ -724,7 +724,7 @@
 
 };
 
-&hdmi_drm {
+&hdmi {
        status = "okay";
 
        port@0 {

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
index af444fc..a09c32e 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
@@ -42,8 +42,8 @@
                gpio2 = &gpio3;
                gpio3 = &gpio4;
                gpio4 = &gpio5;
-               dsi_phy0 = &mipi_dsi_phy_drm;
-               mipi_dsi0 = &mipi_dsi_drm;
+               dsi_phy0 = &mipi_dsi_phy;
+               mipi_dsi0 = &mipi_dsi;
        };
 
        cpus {
@@ -519,7 +519,7 @@
                status = "disabled";
        };
 
-       lcdif_drm: lcdif_drm@30320000 {
+       lcdif: lcdif@30320000 {
                compatible = "fsl,imx8mq-lcdif", "fsl,imx28-lcdif";
                reg = <0x0 0x30320000 0x0 0x10000>;
                clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL_DIV>,
@@ -533,7 +533,7 @@
                status = "disabled";
        };
 
-       dcss_drm: dcss@0x32e00000 {
+       dcss: dcss@0x32e00000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "nxp,imx8mq-dcss";
@@ -572,7 +572,7 @@
                status = "disabled";
        };
 
-       hdmi_drm: hdmi_drm@32c00000 {
+       hdmi: hdmi@32c00000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "fsl,imx8mq-hdmi";
@@ -582,7 +582,7 @@
                status = "disabled";
        };
 
-       mipi_dsi_phy_drm: dsi_phy_drm@30A00300 {
+       mipi_dsi_phy: dsi_phy@30A00300 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "mixel,imx8mq-mipi-dsi-phy";
@@ -591,7 +591,7 @@
                status = "disabled";
        };
 
-       mipi_dsi_bridge_drm: mipi_dsi_bridge_drm@30A00000 {
+       mipi_dsi_bridge: mipi_dsi_bridge@30A00000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "nwl,mipi-dsi";
@@ -604,7 +604,7 @@
                assigned-clocks = <&clk IMX8MQ_CLK_DSI_AHB_SRC>;
                assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
                assigned-clock-rates = <80000000>;
-               phys = <&mipi_dsi_phy_drm>;
+               phys = <&mipi_dsi_phy>;
                phy-names = "dphy";
                status = "disabled";
 
@@ -615,7 +615,7 @@
                };
        };
 
-       mipi_dsi_drm: mipi_dsi_drm@30A00000 {
+       mipi_dsi: mipi_dsi@30A00000 {
                compatible = "fsl,imx8mq-mipi-dsi_drm";
                clocks = <&clk IMX8MQ_CLK_DSI_CORE_DIV>,
                         <&clk IMX8MQ_CLK_DSI_PHY_REF_DIV>;
@@ -628,7 +628,7 @@
                power-domains = <&mipi_pd>;
                src = <&src>;
                mux-sel = <&gpr>;
-               phys = <&mipi_dsi_phy_drm>;
+               phys = <&mipi_dsi_phy>;
                phy-names = "dphy";
                status = "disabled";