ARM: dts: aspeed: rainier: Add FSI I2C masters

The host processor contains i2c masters on each cfam.

Signed-off-by: Joel Stanley <joel@jms.id.au>

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index b15a85a..91c4a11 100644 (file)
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -201,6 +201,13 @@
                        reg = <0x1000 0x400>;
                };
 
+               i2c@1800 {
+                       compatible = "ibm,fsi-i2c-master";
+                       reg = <0x1800 0x400>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                fsi2spi@1c00 {
                        compatible = "ibm,fsi2spi";
                        reg = <0x1c00 0x400>;
@@ -306,6 +313,13 @@
                        reg = <0x1000 0x400>;
                };
 
+               i2c@1800 {
+                       compatible = "ibm,fsi-i2c-master";
+                       reg = <0x1800 0x400>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                fsi2spi@1c00 {
                        compatible = "ibm,fsi2spi";
                        reg = <0x1c00 0x400>;
@@ -409,6 +423,13 @@
                        reg = <0x1000 0x400>;
                };
 
+               i2c@1800 {
+                       compatible = "ibm,fsi-i2c-master";
+                       reg = <0x1800 0x400>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                fsi2spi@1c00 {
                        compatible = "ibm,fsi2spi";
                        reg = <0x1c00 0x400>;