struct regulator *vpcie;
struct regmap *reg_src;
struct regulator *pcie_phy_regulator;
+ struct regulator *pcie_bus_regulator;
};
/* Parameters for the waiting for PCIe PHY PLL to lock on i.MX7 */
IMX6SX_GPR12_PCIE_RX_EQ_2);
}
+ if (imx6_pcie->pcie_bus_regulator != NULL) {
+ ret = regulator_enable(imx6_pcie->pcie_bus_regulator);
+ if (ret)
+ dev_err(imx6_pcie->pci->dev, "failed to enable pcie regulator.\n");
+ }
+
if (imx6_pcie->variant != IMX7D) {
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6Q_GPR12_PCIE_CTL_2, 0 << 10);
release_bus_freq(BUS_FREQ_HIGH);
if (imx6_pcie->pcie_phy_regulator != NULL)
regulator_disable(imx6_pcie->pcie_phy_regulator);
+ if (imx6_pcie->pcie_bus_regulator != NULL)
+ regulator_disable(imx6_pcie->pcie_bus_regulator);
}
return -ETIMEDOUT;
/* Power down PCIe PHY. */
if (imx6_pcie->pcie_phy_regulator != NULL)
regulator_disable(imx6_pcie->pcie_phy_regulator);
+ if (imx6_pcie->pcie_bus_regulator != NULL)
+ regulator_disable(imx6_pcie->pcie_bus_regulator);
if (gpio_is_valid(imx6_pcie->power_on_gpio))
gpio_set_value_cansleep(imx6_pcie->power_on_gpio, 0);
} else {
break;
}
+ imx6_pcie->pcie_bus_regulator = devm_regulator_get(dev,
+ "pcie-bus");
+ if (IS_ERR(imx6_pcie->pcie_bus_regulator))
+ imx6_pcie->pcie_bus_regulator = NULL;
+
/* Grab GPR config register range */
if (imx6_pcie->variant == IMX7D) {
imx6_pcie->iomuxc_gpr =