x86/msr-index: Add bunch of MSRs for Arch LBR

Add Arch LBR related MSRs and the new LBR INFO bits in MSR-index.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1593780569-62993-8-git-send-email-kan.liang@linux.intel.com

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index e8370e6..bdc07fc 100644 (file)
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -158,7 +158,23 @@
 #define LBR_INFO_MISPRED               BIT_ULL(63)
 #define LBR_INFO_IN_TX                 BIT_ULL(62)
 #define LBR_INFO_ABORT                 BIT_ULL(61)
+#define LBR_INFO_CYC_CNT_VALID         BIT_ULL(60)
 #define LBR_INFO_CYCLES                        0xffff
+#define LBR_INFO_BR_TYPE_OFFSET                56
+#define LBR_INFO_BR_TYPE               (0xfull << LBR_INFO_BR_TYPE_OFFSET)
+
+#define MSR_ARCH_LBR_CTL               0x000014ce
+#define ARCH_LBR_CTL_LBREN             BIT(0)
+#define ARCH_LBR_CTL_CPL_OFFSET                1
+#define ARCH_LBR_CTL_CPL               (0x3ull << ARCH_LBR_CTL_CPL_OFFSET)
+#define ARCH_LBR_CTL_STACK_OFFSET      3
+#define ARCH_LBR_CTL_STACK             (0x1ull << ARCH_LBR_CTL_STACK_OFFSET)
+#define ARCH_LBR_CTL_FILTER_OFFSET     16
+#define ARCH_LBR_CTL_FILTER            (0x7full << ARCH_LBR_CTL_FILTER_OFFSET)
+#define MSR_ARCH_LBR_DEPTH             0x000014cf
+#define MSR_ARCH_LBR_FROM_0            0x00001500
+#define MSR_ARCH_LBR_TO_0              0x00001600
+#define MSR_ARCH_LBR_INFO_0            0x00001200
 
 #define MSR_IA32_PEBS_ENABLE           0x000003f1
 #define MSR_PEBS_DATA_CFG              0x000003f2