MLK-12533 mx6sx: select OSC as uart's clk parent

As M4 is sourcing UART clk from OSC, to make UART work
when M4 is enabled, need to select OSC as clk parent,
24M OSC is enough for debug UART in uboot.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit b5e1b393192099e91c5cb75b69291c87eacb9f60)
(cherry picked from commit 416dea861c2dd5a197bf2354069bba8415a20b12)

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index d75b0cf..71b9c89 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -408,6 +408,16 @@ void vadc_power_down(void)
 }
 #endif
 
+static void set_uart_from_osc(void)
+{
+       u32 reg;
+
+       /* set uart clk to OSC */
+       reg = readl(CCM_BASE_ADDR + 0x24);
+       reg |= MXC_CCM_CSCDR1_UART_CLK_SEL;
+       writel(reg, CCM_BASE_ADDR + 0x24);
+}
+
 int arch_cpu_init(void)
 {
        init_aips();
@@ -477,6 +487,9 @@ int arch_cpu_init(void)
        set_preclk_from_osc();
 #endif
 
+       if (is_mx6sx())
+               set_uart_from_osc();
+
        imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */
 
 #ifdef CONFIG_APBH_DMA