LF-2928: clk: imx8mp: fix mclk register fail

Those MX8MP_SAIn_MCLK are not used by CCM clock controller in DTS,
so we can't get those clk in driver which results in the following
boot error messages during probe:
i.MX clk 324: register failed with -2
i.MX clk 325: register failed with -2
i.MX clk 330: register failed with -2
...

As those SAIn_MCLK does not belong to CCM and can be referenced
directly in DT, we can just delete them in CCM clock driver.

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Joy Zou <joy.zou@nxp.com>

diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 7e334dc..af8a7f0 100644 (file)
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -757,12 +757,6 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
        hws[IMX8MP_CLK_EXT2] = imx_obtain_fixed_clk_hw(np, "clk_ext2");
        hws[IMX8MP_CLK_EXT3] = imx_obtain_fixed_clk_hw(np, "clk_ext3");
        hws[IMX8MP_CLK_EXT4] = imx_obtain_fixed_clk_hw(np, "clk_ext4");
-       hws[IMX8MP_SAI1_MCLK] = imx_obtain_fixed_clk_hw(np, "sai1_mclk");
-       hws[IMX8MP_SAI2_MCLK] = imx_obtain_fixed_clk_hw(np, "sai2_mclk");
-       hws[IMX8MP_SAI3_MCLK] = imx_obtain_fixed_clk_hw(np, "sai3_mclk");
-       hws[IMX8MP_SAI5_MCLK] = imx_obtain_fixed_clk_hw(np, "sai5_mclk");
-       hws[IMX8MP_SAI6_MCLK] = imx_obtain_fixed_clk_hw(np, "sai6_mclk");
-       hws[IMX8MP_SAI7_MCLK] = imx_obtain_fixed_clk_hw(np, "sai7_mclk");
 
        hws[IMX8MP_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", anatop_base + 0x0, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
        hws[IMX8MP_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", anatop_base + 0x14, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));

diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h
index ecd81c4..4018690 100644 (file)
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -333,14 +333,6 @@
 #define IMX8MP_CLK_SAI7_ROOT                   322
 #define IMX8MP_CLK_PDM_ROOT                    323
 
-#define IMX8MP_SAI1_MCLK                       324
-#define IMX8MP_SAI2_MCLK                       325
-#define IMX8MP_SAI3_MCLK                       326
-#define IMX8MP_SAI4_MCLK                       327
-#define IMX8MP_SAI5_MCLK                       328
-#define IMX8MP_SAI6_MCLK                       329
-#define IMX8MP_SAI7_MCLK                       330
-
 #define IMX8MP_CLK_END                         331
 
 #define IMX8MP_CLK_AUDIO_BLK_CTRL_SAI1_IPG             0