MLK-9974: ASoC: fsl_sai: There is underrun detected in the beginning sometimes
authorShengjiu Wang <shengjiu.wang@freescale.com>
Mon, 29 Dec 2014 05:40:08 +0000 (13:40 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 19:48:06 +0000 (14:48 -0500)
Write initial words to SAI FIFO to reduce underrun error

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 7ba8ae883d84540fac5ed4147d124399537bc0b3)
(cherry picked from commit f4435f35aa2a97551d2c4a12ca316c354a880f85)

sound/soc/fsl/fsl_sai.c

index 9fadf7e..0066a6f 100644 (file)
@@ -509,7 +509,9 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
 {
        struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
        bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
+       u8 channels = substream->runtime->channels;
        u32 xcsr, count = 100;
+       int i;
 
        /*
         * Asynchronous mode: Clear SYNC for both Tx and Rx.
@@ -532,6 +534,11 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
                regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
                                   FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
 
+               for (i = 0; tx && i < channels; i++)
+                       regmap_write(sai->regmap, FSL_SAI_TDR, 0x0);
+               if (tx)
+                       udelay(10);
+
                regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
                                   FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
                regmap_update_bits(sai->regmap, FSL_SAI_TCSR,