mtd: rawnand: Rename a NAND chip option
authorMiquel Raynal <miquel.raynal@bootlin.com>
Thu, 7 May 2020 10:52:31 +0000 (12:52 +0200)
committerMiquel Raynal <miquel.raynal@bootlin.com>
Mon, 11 May 2020 07:51:42 +0000 (09:51 +0200)
NAND controller drivers can set the NAND_USE_BOUNCE_BUFFER flag to a
chip 'option' field. With this flag, the core is responsible of
providing DMA-able buffers.

The current behavior is to not force the use of a bounce buffer when
the core thinks this is not needed. So in the end the name is a bit
misleading, because in theory we will always have a DMA buffer but in
practice it will not always be a bounce buffer.

Rename this flag NAND_USES_DMA to be more accurate.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-4-miquel.raynal@bootlin.com
12 files changed:
drivers/mtd/nand/raw/atmel/nand-controller.c
drivers/mtd/nand/raw/brcmnand/brcmnand.c
drivers/mtd/nand/raw/denali.c
drivers/mtd/nand/raw/meson_nand.c
drivers/mtd/nand/raw/mtk_nand.c
drivers/mtd/nand/raw/nand_base.c
drivers/mtd/nand/raw/qcom_nandc.c
drivers/mtd/nand/raw/stm32_fmc2_nand.c
drivers/mtd/nand/raw/sunxi_nand.c
drivers/mtd/nand/raw/tango_nand.c
drivers/mtd/nand/raw/tegra_nand.c
include/linux/mtd/rawnand.h

index 3ba17a9..46a3724 100644 (file)
@@ -1494,7 +1494,7 @@ static void atmel_nand_init(struct atmel_nand_controller *nc,
         * suitable for DMA.
         */
        if (nc->dmac)
-               chip->options |= NAND_USE_BOUNCE_BUFFER;
+               chip->options |= NAND_USES_DMA;
 
        /* Default to HW ECC if pmecc is available. */
        if (nc->pmecc)
index 57076c3..fe7cd3a 100644 (file)
@@ -2576,7 +2576,7 @@ static int brcmnand_attach_chip(struct nand_chip *chip)
         * to/from, and have nand_base pass us a bounce buffer instead, as
         * needed.
         */
-       chip->options |= NAND_USE_BOUNCE_BUFFER;
+       chip->options |= NAND_USES_DMA;
 
        if (chip->bbt_options & NAND_BBT_USE_FLASH)
                chip->bbt_options |= NAND_BBT_NO_OOB;
index 2fcd2ba..7a76b76 100644 (file)
@@ -1226,7 +1226,7 @@ int denali_chip_init(struct denali_controller *denali,
                mtd->name = "denali-nand";
 
        if (denali->dma_avail) {
-               chip->options |= NAND_USE_BOUNCE_BUFFER;
+               chip->options |= NAND_USES_DMA;
                chip->buf_align = 16;
        }
 
index e961f7b..3f37647 100644 (file)
@@ -1269,7 +1269,7 @@ meson_nfc_nand_chip_init(struct device *dev,
        nand_set_flash_node(nand, np);
        nand_set_controller_data(nand, nfc);
 
-       nand->options |= NAND_USE_BOUNCE_BUFFER;
+       nand->options |= NAND_USES_DMA;
        mtd = nand_to_mtd(nand);
        mtd->owner = THIS_MODULE;
        mtd->dev.parent = dev;
index ef149e8..e7ec30e 100644 (file)
@@ -1380,7 +1380,7 @@ static int mtk_nfc_nand_chip_init(struct device *dev, struct mtk_nfc *nfc,
        nand_set_flash_node(nand, np);
        nand_set_controller_data(nand, nfc);
 
-       nand->options |= NAND_USE_BOUNCE_BUFFER | NAND_SUBPAGE_READ;
+       nand->options |= NAND_USES_DMA | NAND_SUBPAGE_READ;
        nand->legacy.dev_ready = mtk_nfc_dev_ready;
        nand->legacy.select_chip = mtk_nfc_select_chip;
        nand->legacy.write_byte = mtk_nfc_write_byte;
index 106edd5..906b8cd 100644 (file)
@@ -3241,7 +3241,7 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from,
 
                if (!aligned)
                        use_bufpoi = 1;
-               else if (chip->options & NAND_USE_BOUNCE_BUFFER)
+               else if (chip->options & NAND_USES_DMA)
                        use_bufpoi = !virt_addr_valid(buf) ||
                                     !IS_ALIGNED((unsigned long)buf,
                                                 chip->buf_align);
@@ -4067,7 +4067,7 @@ static int nand_do_write_ops(struct nand_chip *chip, loff_t to,
 
                if (part_pagewr)
                        use_bufpoi = 1;
-               else if (chip->options & NAND_USE_BOUNCE_BUFFER)
+               else if (chip->options & NAND_USES_DMA)
                        use_bufpoi = !virt_addr_valid(buf) ||
                                     !IS_ALIGNED((unsigned long)buf,
                                                 chip->buf_align);
index 5b11c70..9ab22c5 100644 (file)
@@ -2836,7 +2836,7 @@ static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc,
        chip->legacy.block_markbad      = qcom_nandc_block_markbad;
 
        chip->controller = &nandc->controller;
-       chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER |
+       chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USES_DMA |
                         NAND_SKIP_BBTSCAN;
 
        /* set up initial status value */
index 46b7d04..c5fde09 100644 (file)
@@ -1987,7 +1987,7 @@ static int stm32_fmc2_probe(struct platform_device *pdev)
 
        chip->controller = &fmc2->base;
        chip->options |= NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE |
-                        NAND_USE_BOUNCE_BUFFER;
+                        NAND_USES_DMA;
 
        /* Default ECC settings */
        chip->ecc.mode = NAND_ECC_HW;
index 18ac0b3..26d8622 100644 (file)
@@ -1698,7 +1698,7 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand,
                ecc->read_page = sunxi_nfc_hw_ecc_read_page_dma;
                ecc->read_subpage = sunxi_nfc_hw_ecc_read_subpage_dma;
                ecc->write_page = sunxi_nfc_hw_ecc_write_page_dma;
-               nand->options |= NAND_USE_BOUNCE_BUFFER;
+               nand->options |= NAND_USES_DMA;
        } else {
                ecc->read_page = sunxi_nfc_hw_ecc_read_page;
                ecc->read_subpage = sunxi_nfc_hw_ecc_read_subpage;
index 9acf2de..b92de60 100644 (file)
@@ -568,7 +568,7 @@ static int chip_init(struct device *dev, struct device_node *np)
        chip->legacy.select_chip = tango_select_chip;
        chip->legacy.cmd_ctrl = tango_cmd_ctrl;
        chip->legacy.dev_ready = tango_dev_ready;
-       chip->options = NAND_USE_BOUNCE_BUFFER |
+       chip->options = NAND_USES_DMA |
                        NAND_NO_SUBPAGE_WRITE |
                        NAND_WAIT_TCCS;
        chip->controller = &nfc->hw;
index 6a255ba..f9d046b 100644 (file)
@@ -1115,7 +1115,7 @@ static int tegra_nand_chips_init(struct device *dev,
        if (!mtd->name)
                mtd->name = "tegra_nand";
 
-       chip->options = NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;
+       chip->options = NAND_NO_SUBPAGE_WRITE | NAND_USES_DMA;
 
        ret = nand_scan(chip, 1);
        if (ret)
index e70fea6..d1f5c52 100644 (file)
@@ -185,7 +185,7 @@ enum nand_ecc_algo {
  * This option could be defined by controller drivers to protect against
  * kmap'ed, vmalloc'ed highmem buffers being passed from upper layers
  */
-#define NAND_USE_BOUNCE_BUFFER BIT(20)
+#define NAND_USES_DMA          BIT(20)
 
 /*
  * In case your controller is implementing ->legacy.cmd_ctrl() and is relying