MLK-13096-01 ARM: dts: imx: Update OPP table of imx6ull
authorBai Ping <ping.bai@nxp.com>
Fri, 19 Aug 2016 09:53:32 +0000 (17:53 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 19:52:11 +0000 (14:52 -0500)
According to the latest datasheet(Rev. 0,09/2016), update the
setpoints of i.MX6ULL. we add 25mV margin to cover IR drop
and board tolerance.

LDO enable:
    Freq    VDD_SOC    VDD_ARM
    528MHz  1.175V     1.175V
    396MHz  1.175V     1.025V
    198MHz  1.175V     0.95V

LDO bypass
    Freq    VDD_SOC    VDD_ARM
    528MHz  1.175V     1.175V
    396Mhz  1.175V     1.175V
    198MHz  1.175V     1.175V

Signed-off-by: Bai Ping <ping.bai@nxp.com>
arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2.dts
arch/arm/boot/dts/imx6ull-9x9-evk.dts
arch/arm/boot/dts/imx6ull.dtsi

index 5b1bc14..ccefa44 100644 (file)
        operating-points = <
                /* kHz  uV */
                528000  1175000
-               99000   1175000
+               396000  1175000
+               198000  1175000
        >;
        fsl,soc-operating-points = <
                /* KHz  uV */
                528000  1175000
-               99000   1175000
+               396000  1175000
+               198000  1175000
        >;
        arm-supply = <&sw1a_reg>;
        soc-supply = <&sw1a_reg>;
index cb9e8ef..9ca45fa 100644 (file)
        operating-points = <
                /* kHz  uV */
                528000  1175000
-               99000   1175000
+               396000  1175000
+               198000  1175000
        >;
        fsl,soc-operating-points = <
                /* KHz  uV */
                528000  1175000
-               99000   1175000
+               396000  1175000
+               198000  1175000
        >;
        arm-supply = <&sw1c_reg>;
        soc-supply = <&sw1c_reg>;
index 5f48002..c61190d 100644 (file)
                        operating-points = <
                                /* kHz  uV */
                                528000  1175000
-                               99000   950000
+                               396000  1025000
+                               198000  950000
                        >;
                        fsl,soc-operating-points = <
                                /* KHz  uV */
                                528000  1175000
-                               99000   1175000
+                               396000  1175000
+                               198000  1175000
                        >;
                        clocks = <&clks IMX6UL_CLK_ARM>,
                                 <&clks IMX6UL_CLK_PLL2_BUS>,