According to the latest datasheet(Rev. 0,09/2016), update the
setpoints of i.MX6ULL. we add 25mV margin to cover IR drop
and board tolerance.
LDO enable:
Freq VDD_SOC VDD_ARM
528MHz 1.175V 1.175V
396MHz 1.175V 1.025V
198MHz 1.175V 0.95V
LDO bypass
Freq VDD_SOC VDD_ARM
528MHz 1.175V 1.175V
396Mhz 1.175V 1.175V
198MHz 1.175V 1.175V
Signed-off-by: Bai Ping <ping.bai@nxp.com>
operating-points = <
/* kHz uV */
528000 1175000
- 99000 1175000
+ 396000 1175000
+ 198000 1175000
>;
fsl,soc-operating-points = <
/* KHz uV */
528000 1175000
- 99000 1175000
+ 396000 1175000
+ 198000 1175000
>;
arm-supply = <&sw1a_reg>;
soc-supply = <&sw1a_reg>;
operating-points = <
/* kHz uV */
528000 1175000
- 99000 1175000
+ 396000 1175000
+ 198000 1175000
>;
fsl,soc-operating-points = <
/* KHz uV */
528000 1175000
- 99000 1175000
+ 396000 1175000
+ 198000 1175000
>;
arm-supply = <&sw1c_reg>;
soc-supply = <&sw1c_reg>;
operating-points = <
/* kHz uV */
528000 1175000
- 99000 950000
+ 396000 1025000
+ 198000 950000
>;
fsl,soc-operating-points = <
/* KHz uV */
528000 1175000
- 99000 1175000
+ 396000 1175000
+ 198000 1175000
>;
clocks = <&clks IMX6UL_CLK_ARM>,
<&clks IMX6UL_CLK_PLL2_BUS>,