MLK-16694-2: ARM64: dts: fix assigned-clocks for audio device node
authorShengjiu Wang <shengjiu.wang@nxp.com>
Mon, 23 Oct 2017 03:12:33 +0000 (11:12 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 20:39:01 +0000 (15:39 -0500)
Even the clock is not used by current device, but it is used by
other devices, it also need to be included in the assigned-clocks
list. For in kernel side, clock rate is stored, but in scfw
the clock rate is cleared when power off, this mismatch cause
the parent rate is not set in next device, then children clock rate
is wrong.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dts
arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dts

index 5189cb0..3a979c3 100644 (file)
 &sai1 {
        assigned-clocks = <&clk IMX8QM_AUD_PLL0_DIV>,
                        <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>,
                        <&clk IMX8QM_AUD_SAI_1_MCLK>;
-       assigned-clock-rates = <786432000>, <49152000>, <49152000>;
+       assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_sai1>;
        status = "okay";
                wlf,shared-lrclk;
                power-domains = <&pd_mclk_out0>;
                assigned-clocks = <&clk IMX8QM_AUD_PLL0_DIV>,
+                               <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
                                <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>,
                                <&clk IMX8QM_AUD_MCLKOUT0>;
-               assigned-clock-rates = <786432000>, <12288000>, <12288000>;
+               assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
        };
 };
 
index 8c01af7..2815b23 100644 (file)
        assigned-clocks = <&clk IMX8QXP_ACM_ESAI0_MCLK_SEL>,
                        <&clk IMX8QXP_AUD_PLL0_DIV>,
                        <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>,
                        <&clk IMX8QXP_AUD_ESAI_0_EXTAL_IPG>;
        assigned-clock-parents = <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>;
-       assigned-clock-rates = <0>, <786432000>, <49152000>, <49152000>;
+       assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>;
        dmas = <&edma2 23 0 3>, <&edma2 21 0 2>;
        status = "okay";
 };
 &sai4 {
        assigned-clocks = <&clk IMX8QXP_AUD_PLL0_DIV>,
                        <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>,
                        <&clk IMX8QXP_AUD_SAI_4_MCLK>;
-       assigned-clock-rates = <786432000>, <49152000>, <49152000>;
+       assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
        fsl,sai-asynchronous;
        fsl,txm-rxs;
        status = "okay";
 &sai5 {
        assigned-clocks = <&clk IMX8QXP_AUD_PLL0_DIV>,
                        <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>,
                        <&clk IMX8QXP_AUD_SAI_5_MCLK>;
-       assigned-clock-rates = <786432000>, <49152000>, <49152000>;
+       assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
        fsl,sai-asynchronous;
        fsl,txm-rxs;
        status = "okay";
                wlf,shared-lrclk;
                power-domains = <&pd_mclk_out0>;
                assigned-clocks = <&clk IMX8QXP_AUD_PLL0_DIV>,
+                               <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
                                <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>,
                                <&clk IMX8QXP_AUD_MCLKOUT0>;
-               assigned-clock-rates = <786432000>, <12288000>, <12288000>;
+               assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
        };
 
        pca6416: gpio@20 {
                reset-gpio = <&pca9557_b 1 1>;
                power-domains = <&pd_mclk_out0>;
                assigned-clocks = <&clk IMX8QXP_AUD_PLL0_DIV>,
+                               <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
                                <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>,
                                <&clk IMX8QXP_AUD_MCLKOUT0>;
-               assigned-clock-rates = <786432000>, <12288000>, <12288000>;
+               assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
                status = "okay";
        };
 };
 &sai1 {
        assigned-clocks = <&clk IMX8QXP_AUD_PLL0_DIV>,
                        <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>,
                        <&clk IMX8QXP_AUD_SAI_1_MCLK>;
-       assigned-clock-rates = <786432000>, <49152000>, <49152000>;
+       assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_sai1>;
        status = "okay";