MLK-13967 ARM64: dts: imx8qxp: add SAI0 and ASRC0 nodes

Add audio SAI0 and ASRC0 nodes.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
index 1bbd554..8e70c39 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
@@ -670,7 +670,7 @@
                #dma-cells = <3>;
                shared-interrupt;
                dma-channels = <12>;
-               interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, /* asrc 0 */
+               interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, /* asrc0 */
                                <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
@@ -697,4 +697,60 @@
                power-domains = <&pd_sai0>;
                status = "disabled";
        };
+
+       sai0: sai@59040000 {
+               compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
+               reg = <0x0 0x59040000 0x0 0x10000>;
+               interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&clk IMX8QXP_AUD_SAI_0_IPG>,
+                       <&clk IMX8QXP_AUD_SAI_0_MCLK>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>;
+               clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+               dma-names = "rx", "tx";
+               dmas = <&edma2 12 0 1>, <&edma2 13 0 0>;
+               status = "disabled";
+               power-domains = <&pd_sai0>;
+       };
+
+       asrc0: asrc@59000000 {
+               compatible = "fsl,imx8qm-asrc0";
+               reg = <0x0 0x59000000 0x0 0x10000>;
+               interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>,
+                       <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&clk IMX8QXP_AUD_ASRC_0_IPG>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>,
+                       <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK1_CLK>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_CLK_DUMMY>;
+               clock-names = "ipg", "mem",
+                       "asrck_0", "asrck_1", "asrck_2", "asrck_3",
+                       "asrck_4", "asrck_5", "asrck_6", "asrck_7",
+                       "asrck_8", "asrck_9", "asrck_a", "asrck_b",
+                       "asrck_c", "asrck_d", "asrck_e", "asrck_f",
+                       "spba";
+               dmas = <&edma2 0 0 0>, <&edma2 1 0 0>, <&edma2 2 0 0>,
+                       <&edma2 3 0 1>, <&edma2 4 0 1>, <&edma2 5 0 1>;
+               dma-names = "rxa", "rxb", "rxc",
+                               "txa", "txb", "txc";
+               fsl,asrc-rate  = <8000>;
+               fsl,asrc-width = <16>;
+               power-domains = <&pd_asrc0>;
+               status = "disabled";
+       };
 };