MXSCM-243-2 arm: imx6q: mmdc handshake for lpddr2 2ch-mode on low-power

For i.mx6q systems the mmdc handshake on channel 0 is kept enabled (while
channel 1 is bypassed). This is ok for lpddr2 systems operating on 1ch-mode,
but not true for 2ch-mode. On this case the handshake needs to be set for
both channels, otherwise a kernel panic or Oops error might be observed
after resuming from suspend.

Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>

diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
index 1723651..41e148e 100644 (file)
--- a/arch/arm/mach-imx/pm-imx6.c
+++ b/arch/arm/mach-imx/pm-imx6.c
@@ -685,6 +685,13 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode)
                if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul() ||
                    cpu_is_imx6ull() || cpu_is_imx6sll())
                        val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
+               else if (cpu_is_imx6q() &&
+                   imx_mmdc_get_ddr_type() == IMX_DDR_TYPE_LPDDR2 &&
+                   imx_mmdc_get_lpddr2_2ch_mode() == IMX_LPDDR2_2CH_MODE) {
+                       /* keep handshake enabled for lpddr2 2ch-mode */
+                       val &= ~BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
+                       val &= ~BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
+               }
                else
                        val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
                break;
@@ -703,6 +710,13 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode)
                if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul() ||
                    cpu_is_imx6ull() || cpu_is_imx6sll())
                        val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
+               else if (cpu_is_imx6q() &&
+                   imx_mmdc_get_ddr_type() == IMX_DDR_TYPE_LPDDR2 &&
+                   imx_mmdc_get_lpddr2_2ch_mode() == IMX_LPDDR2_2CH_MODE) {
+                       /* keep handshake enabled for lpddr2 2ch-mode */
+                       val &= ~BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
+                       val &= ~BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
+               }
                else
                        val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
                break;