MLK-13577-2 ARM: imx7: mu: set ABF0 of MU_CR to notify M4 MU finish initialization

set ABF0 of MU_CR to let M4 know MU is ready, thus MU can initialize rpmsg
later.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 4969903fc8d32c5e6dfc4fe5f2f68e52aef080bc)

diff --git a/arch/arm/mach-imx/mu.c b/arch/arm/mach-imx/mu.c
index fd4c58f..6a1bfaf 100644 (file)
--- a/arch/arm/mach-imx/mu.c
+++ b/arch/arm/mach-imx/mu.c
@@ -408,9 +408,10 @@ static int imx_mu_probe(struct platform_device *pdev)
 
        INIT_DELAYED_WORK(&mu_work, mu_work_handler);
        INIT_DELAYED_WORK(&rpmsg_work, rpmsg_work_handler);
+       /* bit0 of MX7ULP_MU_CR used to let m4 to know MU is ready now */
        if (cpu_is_imx7ulp())
                writel_relaxed(readl_relaxed(mu_base + MX7ULP_MU_CR) |
-                       BIT(26) | BIT(27), mu_base + MX7ULP_MU_CR);
+                       BIT(0) | BIT(26) | BIT(27), mu_base + MX7ULP_MU_CR);
        else
                writel_relaxed(readl_relaxed(mu_base + MU_ACR) |
                        BIT(26) | BIT(27), mu_base + MU_ACR);