MGS-3024 dts: update i.MX8MQ device config to enable GPU

enable gpu device in imx8mq-evk board,
increase GPU memory size from 32M to 128M,
enable GPU flat mappping for full DDR range.

add IMX8MQ_CLK_GPU_AHB_DIV into gpu clock list.

Date: 26th June, 2017
Signed-of-by: Chenyan Feng <ella.feng@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts
index 6da5a99..30d1eda 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts
@@ -193,3 +193,7 @@
        assigned-clock-rates = <0>, <786432000>, <98306000>, <24576000>;
        status = "okay";
 };
+
+&gpu {
+       status = "okay";
+};

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
index 273c24b..d0f98ec 100755 (executable)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
@@ -573,12 +573,12 @@
 
        gpu: gpu@38000000 {
                compatible = "fsl,imx8mq-gpu", "fsl,imx6q-gpu";
-               reg = <0x0 0x38000000 0 0x40000>, <0x0 0x60000000 0x0 0x14000000>, <0x0 0x0 0x0 0x2000000>;
+               reg = <0x0 0x38000000 0 0x40000>, <0x0 0x40000000 0x0 0xC0000000>, <0x0 0x0 0x0 0x8000000>;
                reg-names = "iobase_3d", "phys_baseaddr", "contiguous_mem";
-               interrupts = <0 3 0x4>;
+               interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "irq_3d";
-               clocks = <&clk IMX8MQ_CLK_GPU_ROOT>, <&clk IMX8MQ_CLK_GPU_SHADER_DIV>, <&clk IMX8MQ_CLK_GPU_AXI_DIV>;
-               clock-names = "gpu3d_clk", "gpu3d_shader_clk", "gpu3d_axi_clk";
+               clocks = <&clk IMX8MQ_CLK_GPU_ROOT>, <&clk IMX8MQ_CLK_GPU_SHADER_DIV>, <&clk IMX8MQ_CLK_GPU_AXI_DIV>, <&clk IMX8MQ_CLK_GPU_AHB_DIV>;
+               clock-names = "gpu3d_clk", "gpu3d_shader_clk", "gpu3d_axi_clk", "gpu3d_ahb_clk";
                assigned-clocks = <&clk IMX8MQ_CLK_GPU_CORE_SRC>, <&clk IMX8MQ_CLK_GPU_SHADER_SRC>, <&clk IMX8MQ_CLK_GPU_AXI_SRC>, <&clk IMX8MQ_CLK_GPU_AHB_SRC>;
                assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, <&clk IMX8MQ_SYS2_PLL_1000M>, <&clk IMX8MQ_SYS1_PLL_800M>, <&clk IMX8MQ_SYS1_PLL_800M>;
                assigned-clock-rates = <800000000>, <1000000000>, <800000000>, <800000000>;