- reg : Address and length of the register set for the device
- interrupts : Should contain fec interrupt
- phy-mode : See ethernet.txt file in the same directory
+- clock-name: Should be the names of the clocks
+ - "ipg" for MAC ipg_clk_s, ipg_clk_mac_s that are for register accessing
+ - "ahb" for MAC ipg_clk, ipg_clk_mac that are bus clock
+ - "ptp" for IEEE1588 timer clock
+ - "enet_clk_ref" for MAC transmit/receiver reference clock
+ - "enet_out" output clock for external device
+- clocks: Phandles to input clocks.
Optional properties:
- phy-reset-gpios : Should specify the gpio for phy reset
- fsl,wakeup_irq : The property define the wakeup irq index in enet irq source.
- stop-mode : If present, indicates soc need to set gpr bit to request stop
mode.
+- fsl,ar8031-phy-fixup : If present, indicates board need to do phy fixup setting.
+- mii-exclusive: If present, each MAC has their exclusive MDIO bus in current board
+ design, otherwise mutiple MACs share one MDIO bus to reduce Pins utilize.
Optional subnodes:
- mdio : specifies the mdio bus in the FEC, used as a container for phy nodes
* mdio interface in board design, and need to be configured by
* fec0 mii_bus.
*/
- if ((fep->quirks & FEC_QUIRK_ENET_MAC) && fep->dev_id > 0) {
+ if ((fep->quirks & FEC_QUIRK_SINGLE_MDIO) && fep->dev_id > 0) {
/* fec1 uses fec0 mii_bus */
if (mii_cnt && fec0_mii_bus) {
fep->mii_bus = fec0_mii_bus;
mii_cnt++;
/* save fec0 mii_bus */
- if (fep->quirks & FEC_QUIRK_ENET_MAC) {
+ if (fep->quirks & FEC_QUIRK_SINGLE_MDIO) {
fec0_mii_bus = fep->mii_bus;
fec_mii_bus_share = &fep->mii_bus_share;
}
fep->wake_irq = fep->irq[0];
init_completion(&fep->mdio_done);
+
+ /* board only enable one mii bus in default */
+ if (!of_get_property(np, "fsl,mii-exclusive", NULL))
+ fep->quirks |= FEC_QUIRK_SINGLE_MDIO;
ret = fec_enet_mii_init(pdev);
if (ret) {
dev_id = 0;