arm64: dts: freescale: Add i.MX8DM LPDDR4 validation board support

Add i.MX8DM validation board DT support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index a1cf7d4..d02b28b 100644 (file)
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -58,7 +58,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb imx8qm-mek-ov5640.dtb \
                          imx8qm-lpddr4-val-spdif.dtb imx8qm-mek-ca53.dtb \
                          imx8qm-mek-ca72.dtb imx8qm-lpddr4-val-ca53.dtb \
                          imx8qm-lpddr4-val-ca72.dtb imx8qm-ddr4-val.dtb \
-                         imx8qp-lpddr4-val.dtb
+                         imx8qp-lpddr4-val.dtb imx8dm-lpddr4-val.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8dxl-phantom-mek.dtb

diff --git a/arch/arm64/boot/dts/freescale/imx8dm-lpddr4-val.dts b/arch/arm64/boot/dts/freescale/imx8dm-lpddr4-val.dts
new file mode 100644 (file)
index 0000000..ad663b2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dm-lpddr4-val.dts
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+#include "imx8dm.dtsi"
+#include "imx8q-val.dtsi"
+
+/ {
+        model = "Freescale i.MX8DM Validation Board";
+        compatible = "fsl,imx8dm-val", "fsl,imx8dm", "fsl,imx8qm";
+};
+
+&gpu_3d1 {
+    status = "disabled";
+};
+
+&dc1_prg1 {
+    status = "disabled";
+};
+
+&dc1_prg2 {
+    status = "disabled";
+};

diff --git a/arch/arm64/boot/dts/freescale/imx8dm.dtsi b/arch/arm64/boot/dts/freescale/imx8dm.dtsi
new file mode 100644 (file)
index 0000000..23cbfb3
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dm.dtsi
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+#include "imx8qm.dtsi"
+
+/ {
+        model = "Freescale i.MX8DM";
+        compatible = "fsl, imx8dm", "fsl,imx8qm";
+
+};
+
+&thermal_zones {
+       /delete-node/ cpu-thermal0;
+
+       pmic-thermal0 {
+               cooling-maps {
+                       map0 {
+                               cooling-device =
+                               <&A72_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                               <&A72_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                       };
+               };
+       };
+};
+
+&cpus {
+       /delete-node/ cpu-map;
+       /delete-node/ cpu@0;
+       /delete-node/ cpu@1;
+       /delete-node/ cpu@2;
+       /delete-node/ cpu@3;
+       /delete-node/ l2-cache0;
+};