MLK-18142 imx: timer: Modify GPT timer driver for mx7

Modify the GPT common platform driver for mx7 which only use 24Mhz
OSC as clock source.

Note: at default, the mx7d will use system counter as timer. The GPT
is disabled.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit ff8902ab14705935a30f318db8d1c71ce3cc40dc)

diff --git a/arch/arm/mach-imx/timer.c b/arch/arm/mach-imx/timer.c
index ed5eb1c..68a8060 100644 (file)
--- a/arch/arm/mach-imx/timer.c
+++ b/arch/arm/mach-imx/timer.c
@@ -3,7 +3,8 @@
  * (C) Copyright 2007
  * Sascha Hauer, Pengutronix
  *
- * (C) Copyright 2009 Freescale Semiconductor, Inc.
+ * (C) Copyright 2009-2016 Freescale Semiconductor, Inc.
+ * Copyright 2018 NXP
  */
 
 #include <common.h>
@@ -37,18 +38,16 @@ static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;
 #define GPTPR_PRESCALER24M_SHIFT 12
 #define GPTPR_PRESCALER24M_MASK (0xF << GPTPR_PRESCALER24M_SHIFT)
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static inline int gpt_has_clk_source_osc(void)
 {
-#if defined(CONFIG_MX6)
        if (((is_mx6dq()) && (soc_rev() > CHIP_REV_1_0)) ||
            is_mx6dqp() || is_mx6sdl() || is_mx6sx() || is_mx6ul() ||
-           is_mx6ull() || is_mx6sll())
+           is_mx6ull() || is_mx6sll() || is_mx7())
                return 1;
 
        return 0;
-#else
-       return 0;
-#endif
 }
 
 static inline ulong gpt_get_clk(void)
@@ -71,7 +70,8 @@ int timer_init(void)
        __raw_writel(GPTCR_SWR, &cur_gpt->control);
 
        /* We have no udelay by now */
-       __raw_writel(0, &cur_gpt->control);
+       for (i = 0; i < 100; i++)
+               __raw_writel(0, &cur_gpt->control);
 
        i = __raw_readl(&cur_gpt->control);
        i &= ~GPTCR_CLKSOURCE_MASK;
@@ -85,7 +85,7 @@ int timer_init(void)
                 * Enable bit and prescaler
                 */
                if (is_mx6sdl() || is_mx6sx() || is_mx6ul() || is_mx6ull() ||
-                   is_mx6sll()) {
+                   is_mx6sll() || is_mx7()) {
                        i |= GPTCR_24MEN;
 
                        /* Produce 3Mhz clock */
@@ -101,6 +101,9 @@ int timer_init(void)
 #endif
        __raw_writel(i, &cur_gpt->control);
 
+       gd->arch.tbl = __raw_readl(&cur_gpt->counter);
+       gd->arch.tbu = 0;
+
        return 0;
 }