arm64: dts: imx8mn: add inmate/root dts

Add inmate/root dts for jailhouse dual linux case.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 53b23ff..2a3b86f 100644 (file)
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -34,7 +34,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb imx8mn-evk-rm67191.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb imx8mn-ddr4-evk-ak5558.dtb imx8mn-ddr4-evk-rm67191.dtb \
-                         imx8mn-ddr4-evk-rpmsg.dtb
+                         imx8mn-ddr4-evk-rpmsg.dtb imx8mn-ddr4-evk-root.dtb imx8mn-ddr4-evk-inmate.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb imx8mq-evk-rpmsg.dtb

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk-inmate.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk-inmate.dts
new file mode 100644 (file)
index 0000000..bdff971
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk-inmate.dts
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+#include "imx8mn.dtsi"
+
+/ {
+       model = "Freescale i.MX8MN EVK";
+       compatible = "fsl,imx8mn-evk", "fsl,imx8mm";
+
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Secure */
+                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Non-Secure */
+                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Virtual */
+                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; /* Hypervisor */
+               clock-frequency = <8333333>;
+       };
+
+       clk_dummy: clock@7 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+               clock-output-names = "clk_dummy";
+       };
+
+       /* The clocks are configured by 1st OS */
+       clk_200m: clock@8 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <200000000>;
+               clock-output-names = "200m";
+       };
+       clk_266m: clock@9 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <266000000>;
+               clock-output-names = "266m";
+       };
+       clk_80m: clock@10 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <80000000>;
+               clock-output-names = "80m";
+       };
+
+       pci@bb800000 {
+               compatible = "pci-host-ecam-generic";
+               device_type = "pci";
+               bus-range = <0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               interrupt-map-mask = <0 0 0 7>;
+               interrupt-map = <0 0 0 1 &gic GIC_SPI 76 IRQ_TYPE_EDGE_RISING>;
+               reg = <0x0 0xbb800000 0x0 0x100000>;
+               ranges = <0x02000000 0x00 0x10000000 0x0 0x10000000 0x00 0x10000>;
+       };
+};
+
+/*/delete-node/ &{/reserved-memory};*/
+/*/delete-node/ &{/busfreq};*/
+/*/delete-node/ &ddr_pmu0;*/
+
+&hsiomix_pd {
+       status = "disabled";
+};
+
+&usb_otg1_pd {
+       status = "disabled";
+};
+
+&gpumix_pd {
+       status = "disabled";
+};
+
+&dispmix_pd {
+       status = "disabled";
+};
+
+&mipi_pd {
+       status = "disabled";
+};
+
+&gpio1 {
+       status = "disabled";
+};
+&gpio2 {
+       status = "disabled";
+};
+&gpio3 {
+       status = "disabled";
+};
+&gpio4 {
+       status = "disabled";
+};
+&gpio5 {
+       status = "disabled";
+};
+
+/*/delete-node/ &tmu;*/
+/*/delete-node/ &{/thermal-zones};*/
+&iomuxc {
+       status = "disabled";
+};
+
+&gpr {
+       /delete-property/ compatible;
+};
+
+/delete-node/ &anatop;
+/delete-node/ &snvs;
+
+&clk {
+       /delete-property/ compatible;
+};
+
+&src {
+       /delete-property/ compatible;
+};
+
+/*/delete-node/ &rpmsg;*/
+&ocotp {
+       /delete-property/ compatible;
+       status = "disabled";
+};
+
+/*
+&dispmix_gpr {
+       /delete-property/ compatible;
+};
+*/
+
+&sdma1 {
+       status = "disabled";
+};
+
+&sdma2 {
+       status = "disabled";
+};
+
+&sdma3 {
+       status = "disabled";
+};
+
+&thermal {
+       cpu-thermal {
+               cooling-maps {
+                       map0 {
+                               cooling-device =
+                                       <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                       <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                       };
+               };
+       };
+};
+
+/*/delete-node/ &{/imx_ion};*/
+/delete-node/ &crypto;
+/*/delete-node/ &caam_sm;
+/delete-node/ &caam_snvs;
+/delete-node/ &irq_sec_vio;*/
+
+/delete-node/ &{/cpus/cpu@0};
+/delete-node/ &{/cpus/cpu@1};
+/*/delete-node/ &{/pmu};*/
+
+&uart4 {
+       clocks = <&osc_24m>,
+               <&osc_24m>;
+       clock-names = "ipg", "per";
+       /delete-property/ dmas;
+       /delete-property/ dmas-names;
+       status = "okay";
+};
+
+&usdhc3 {
+       clocks = <&clk_dummy>,
+               <&clk_266m>,
+               <&clk_200m>;
+       /delete-property/assigned-clocks;
+       /delete-property/assigned-clock-rates;
+       clock-names = "ipg", "ahb", "per";
+       bus-width = <8>;
+       non-removable;
+       status = "okay";
+};

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk-root.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk-root.dts
new file mode 100644 (file)
index 0000000..9e71421
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk-root.dts
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2019 NXP
+ */
+
+#include "imx8mn-ddr4-evk.dts"
+
+/*
+TODO: need uncomment when linux ready
+&cpu_pd_wait {
+       /delete-property/ compatible;
+};
+*/
+
+&{/} {
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               linux,cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0 0x28000000>;
+                       alloc-ranges = <0 0x40000000 0 0x93c00000>;
+                       linux,cma-default;
+               };
+
+               ivshmem_reserved: ivshmem@0xbbb00000 {
+                       no-map;
+                       reg = <0 0xbbb00000 0x0 0x00100000>;
+               };
+
+               ivshmem2_reserved: ivshmem2@0xbba00000 {
+                       no-map;
+                       reg = <0 0xbba00000 0x0 0x00100000>;
+               };
+
+               pci_reserved: pci@0xbb800000 {
+                       no-map;
+                       reg = <0 0xbb800000 0x0 0x00200000>;
+               };
+
+               loader_reserved: loader@0xbb700000 {
+                       no-map;
+                       reg = <0 0xbb700000 0x0 0x00100000>;
+               };
+
+               jh_reserved: jh@0xb7c00000 {
+                       no-map;
+                       reg = <0 0xb7c00000 0x0 0x00400000>;
+               };
+
+               /* 512MB */
+               inmate_reserved: inmate@0x93c00000 {
+                       no-map;
+                       reg = <0 0x93c00000 0x0 0x24000000>;
+               };
+       };
+};
+
+&iomuxc {
+       /*
+        * Used for the 2nd Linux.
+        * TODO: M4 may use these pins.
+        */
+       pinctrl_uart4: uart4grp {
+               fsl,pins = <
+                       MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX     0x140
+                       MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX     0x140
+               >;
+       };
+};
+
+&clk {
+       init-on-array = <IMX8MN_CLK_NAND_USDHC_BUS
+                        IMX8MN_CLK_USDHC3_ROOT
+                        IMX8MN_CLK_UART4_ROOT>;
+};
+
+&uart2 {
+       pinctrl-0 = <&pinctrl_uart2>, <&pinctrl_uart4>;
+       assigned-clocks = <&clk IMX8MN_CLK_UART4>;
+       assigned-clock-parents = <&clk IMX8MN_CLK_24M>;
+};
+
+&usdhc3 {
+       status = "disabled";
+};
+
+&usdhc2 {
+       pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-1 = <&pinctrl_usdhc3>, <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-2 = <&pinctrl_usdhc3>, <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+};

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index ffc63a4..598e608 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -274,7 +274,7 @@
                method = "smc";
        };
 
-       thermal-zones {
+       thermal: thermal-zones {
                cpu-thermal {
                        polling-delay-passive = <250>;
                        polling-delay = <2000>;