MLK-16586-1 clk: imx8qm: add the cm41 ipg clk
authorRichard Zhu <hongxing.zhu@nxp.com>
Mon, 9 Oct 2017 08:25:33 +0000 (16:25 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 20:38:54 +0000 (15:38 -0500)
Add the cm41 ipg clk

BuildInfo:
- SCFW a6fd9a48, IMX-MKIMAGE 0, ATF 0
- U-Boot 2017.03-imx_v2017.03_4.9.11_imx8_alpha+g258936c

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Tested-by: Andy Duan <fugang.duan@nxp.com>
drivers/clk/imx/clk-imx8qm.c
include/dt-bindings/clock/imx8qm-clock.h
include/dt-bindings/soc/imx8_pd.h

index 97c1b29..a99176b 100644 (file)
@@ -578,6 +578,7 @@ static int imx8qm_clk_probe(struct platform_device *pdev)
        clks[IMX8QM_SAI6_RX_BCLK]          = imx_clk_fixed("sai6_rx_bclk", 0);
        clks[IMX8QM_HDMI_TX_SAI0_TX_BCLK]  = imx_clk_fixed("hdmi_tx_sai0_tx_bclk", 0);
        clks[IMX8QM_CM40_IPG_CLK]       = imx_clk_fixed("ipg_cm40_clk_root", SC_132MHZ);
+       clks[IMX8QM_CM41_IPG_CLK]       = imx_clk_fixed("ipg_cm41_clk_root", SC_132MHZ);
 
        np_acm = of_find_compatible_node(NULL, NULL, "nxp,imx8qm-acm");
        if (np_acm) {
index a5b57c4..bd0db40 100644 (file)
 
 /* CM40 */
 #define IMX8QM_CM40_IPG_CLK                            772
+#define IMX8QM_CM41_IPG_CLK                            773
 
-#define IMX8QM_CLK_END                                 773
+#define IMX8QM_CLK_END                                 774
 
 #endif /* __DT_BINDINGS_CLOCK_IMX8QM_H */
index 1483ac3..5727506 100644 (file)
 #define PD_CM40                     cm40_power_domain
 #define PD_CM40_I2C                 cm40_i2c
 #define PD_CM40_INTMUX              cm40_intmux
+#define PD_CM41                     cm41_power_domain
+#define PD_CM41_INTMUX              cm41_intmux
 
 #endif /* __DT_BINDINGS_IMX8_PD_H */