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MLK-19317-1 drm/bridge: sec-dsim: add missing 'ctrail' assignment
author
Fancy Fang
<chen.fang@nxp.com>
Thu, 30 Aug 2018 09:45:47 +0000
(17:45 +0800)
committer
Leonard Crestez
<leonard.crestez@nxp.com>
Wed, 17 Apr 2019 23:51:34 +0000
(
02:51
+0300)
In the macro 'DSIM_DPHY_TIMING' definition, the field
'clk_trail' assignment to 'ctrail' is missing which
certainly needs to be added.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit
f2818410d3d8d3b09002a85b593cee192d60bb06
)
(cherry picked from commit
4cda22c138913af72f4eddf9ce53c98d96c69379
)
include/drm/bridge/sec_mipi_dsim.h
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diff --git
a/include/drm/bridge/sec_mipi_dsim.h
b/include/drm/bridge/sec_mipi_dsim.h
index
4484218
..
2b125b2
100644
(file)
--- a/
include/drm/bridge/sec_mipi_dsim.h
+++ b/
include/drm/bridge/sec_mipi_dsim.h
@@
-54,6
+54,7
@@
struct sec_mipi_dsim_dphy_timing {
.clk_prepare = cpre, \
.clk_zero = czero, \
.clk_post = cpost, \
+ .clk_trail = ctrail, \
.hs_prepare = hpre, \
.hs_zero = hzero, \
.hs_trail = htrail, \