*/
#include <linux/irqchip.h>
+#include <linux/mfd/syscon.h>
#include <linux/of_platform.h>
+#include <linux/regmap.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
mx7ulp_aips_map_entry(5, MT_DEVICE),
};
+#define SIM_JTAG_ID_REG 0x8c
+
static void __init imx7ulp_init_machine(void)
{
struct device *parent;
+ struct regmap *sim;
+ u32 revision;
+ int ret;
+
+ sim = syscon_regmap_lookup_by_compatible("fsl,imx7ulp-sim");
+ if (IS_ERR(sim)) {
+ pr_err("failed to find fsl,imx7ulp-sim regmap!\n");
+ return;
+ }
+
+ ret = regmap_read(sim, SIM_JTAG_ID_REG, &revision);
+ if (ret)
+ pr_err("failed to read sim regmap!\n");
+
+ /*
+ * bit[31:28] of JTAG_ID register defines revision
+ * as below from B0:
+ * 0001 B0
+ * 0010 B1
+ */
+ switch (revision >> 28) {
+ case 1:
+ imx_set_soc_revision(IMX_CHIP_REVISION_2_0);
+ break;
+ case 2:
+ imx_set_soc_revision(IMX_CHIP_REVISION_2_1);
+ break;
+ default:
+ imx_set_soc_revision(IMX_CHIP_REVISION_1_0);
+ break;
+ }
parent = imx_soc_device_init();
if (parent == NULL)