MLK-20259 ARM: imx: add soc revision check for i.MX7ULP
authorAnson Huang <Anson.Huang@nxp.com>
Wed, 7 Nov 2018 06:14:11 +0000 (14:14 +0800)
committerLeonard Crestez <leonard.crestez@nxp.com>
Wed, 17 Apr 2019 23:51:34 +0000 (02:51 +0300)
i.MX7ULP SoC revision is available from B0, the SIM_JTAG_ID
register bit[31:28] indicates SoC revision as below:

4b'0001        B0
4b'0010        B1

This register is NOT available on A0, tested on B1 chip
as below:

root@imx7ulpevk:~# cat /sys/devices/soc0/revision
2.1

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
Tested-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
arch/arm/mach-imx/mach-imx7ulp.c

index 2d916e1..bf385b4 100644 (file)
@@ -8,7 +8,9 @@
  */
 
 #include <linux/irqchip.h>
+#include <linux/mfd/syscon.h>
 #include <linux/of_platform.h>
+#include <linux/regmap.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
@@ -25,9 +27,42 @@ static struct map_desc mx7ulp_io_desc[] __initdata = {
        mx7ulp_aips_map_entry(5, MT_DEVICE),
 };
 
+#define SIM_JTAG_ID_REG                0x8c
+
 static void __init imx7ulp_init_machine(void)
 {
        struct device *parent;
+       struct regmap *sim;
+       u32 revision;
+       int ret;
+
+       sim = syscon_regmap_lookup_by_compatible("fsl,imx7ulp-sim");
+       if (IS_ERR(sim)) {
+               pr_err("failed to find fsl,imx7ulp-sim regmap!\n");
+               return;
+       }
+
+       ret = regmap_read(sim, SIM_JTAG_ID_REG, &revision);
+       if (ret)
+               pr_err("failed to read sim regmap!\n");
+
+       /*
+        * bit[31:28] of JTAG_ID register defines revision
+        * as below from B0:
+        * 0001        B0
+        * 0010        B1
+        */
+       switch (revision >> 28) {
+       case 1:
+               imx_set_soc_revision(IMX_CHIP_REVISION_2_0);
+               break;
+       case 2:
+               imx_set_soc_revision(IMX_CHIP_REVISION_2_1);
+               break;
+       default:
+               imx_set_soc_revision(IMX_CHIP_REVISION_1_0);
+               break;
+       }
 
        parent = imx_soc_device_init();
        if (parent == NULL)