MLK-19399: HDP API: Merge CDN_1_0_38 API release

Merge CDN_1_0_38 release to HDP API.
v1_0_38 release notes:
DP: Added functionality for setting own PHY register values related to
voltage swing and pre-emphasis.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>

diff --git a/drivers/gpu/drm/imx/hdp/API_AFE_mcu1_dp.c b/drivers/gpu/drm/imx/hdp/API_AFE_mcu1_dp.c
index c228914..450d31f 100644 (file)
--- a/drivers/gpu/drm/imx/hdp/API_AFE_mcu1_dp.c
+++ b/drivers/gpu/drm/imx/hdp/API_AFE_mcu1_dp.c
@@ -48,6 +48,21 @@
 #include "API_AFE_mcu1_dp.h"
 #include "../../../../mxc/hdp/all.h"
 
+/* values of TX_TXCC_MGNFS_MULT_000 register for [voltage_swing][pre_emphasis]
+ * 0xFF means, that the combination is forbidden.
+static u16 mgnfsValues[4][4] = {{0x2B, 0x19, 0x0E, 0x02},
+                                               {0x21, 0x10, 0x01, 0xFF},
+                                               {0x18, 0x02, 0xFF, 0xFF},
+                                               {0x04, 0xFF, 0xFF, 0xFF}};
+
+* values of TX_TXCC_CPOST_MULT_00 register for [voltage_swing][pre_emphasis]
+* 0xFF means, that the combination is forbidden.
+static u16 cpostValues[4][4] = {{0x00, 0x14, 0x21, 0x29},
+                                               {0x00, 0x15, 0x20, 0xFF},
+                                               {0x00, 0x15, 0xFF, 0xFF},
+                                               {0x00, 0xFF, 0xFF, 0xFF}};
+*/
+
 static void AFE_WriteReg(state_struct *state, ENUM_AFE_LINK_RATE link_rate,
                         unsigned int addr,
                         unsigned int val1_6,

diff --git a/drivers/gpu/drm/imx/hdp/API_AFE_mcu2_dp.c b/drivers/gpu/drm/imx/hdp/API_AFE_mcu2_dp.c
index 8ef7b8e..050e1ec 100644 (file)
--- a/drivers/gpu/drm/imx/hdp/API_AFE_mcu2_dp.c
+++ b/drivers/gpu/drm/imx/hdp/API_AFE_mcu2_dp.c
@@ -47,6 +47,21 @@
 #include "API_AFE_mcu2_dp.h"
 #include "../../../../mxc/hdp/all.h"
 
+/* values of TX_TXCC_MGNFS_MULT_000 register for [voltage_swing][pre_emphasis]
+ * 0xFF means, that the combination is forbidden.
+static u16 mgnfsValues[4][4] = {{0x2B, 0x19, 0x0E, 0x02},
+                                               {0x21, 0x10, 0x01, 0xFF},
+                                               {0x18, 0x02, 0xFF, 0xFF},
+                                               {0x04, 0xFF, 0xFF, 0xFF}};
+
+* values of TX_TXCC_CPOST_MULT_00 register for [voltage_swing][pre_emphasis]
+* 0xFF means, that the combination is forbidden.
+static u16 cpostValues[4][4] = {{0x00, 0x14, 0x21, 0x29},
+                                               {0x00, 0x15, 0x20, 0xFF},
+                                               {0x00, 0x15, 0xFF, 0xFF},
+                                               {0x00, 0xFF, 0xFF, 0xFF}};
+*/
+
 static void afe_write_reg(state_struct *state,
                          ENUM_AFE_LINK_RATE link_rate,
                          unsigned int addr,

diff --git a/drivers/gpu/drm/imx/hdp/ss28fdsoi_hdmitx_table.c b/drivers/gpu/drm/imx/hdp/ss28fdsoi_hdmitx_table.c
index 6c25f8d..53f05ad 100644 (file)
--- a/drivers/gpu/drm/imx/hdp/ss28fdsoi_hdmitx_table.c
+++ b/drivers/gpu/drm/imx/hdp/ss28fdsoi_hdmitx_table.c
@@ -65,7 +65,10 @@ const u32 ss28fdsoi_hdmitx_clock_control_table[SS28FDSOI_HDMITX_CLOCK_CONTROL_TA
        { 25000,  42500, 2000,  500000,  850000, 0x05, 0x01, 0x01, 400, 0x182, 0x00A, 2000000, 3400000, 0, 1, 1, 2, 4,  250000,  425000, 0x02,  50000,  85000},
        { 42500,  85000, 2000,  850000, 1700000, 0x08, 0x03, 0x01, 320, 0x132, 0x00A, 1700000, 3400000, 0, 1, 1, 2, 2,  425000,  850000, 0x01,  85000, 170000},
        { 85000, 170000, 2000, 1700000, 3400000, 0x11, 0x00, 0x07, 340, 0x146, 0x00A, 1700000, 3400000, 0, 1, 1, 2, 1,  850000, 1700000, 0x00, 170000, 340000},
-       {170000, 300000, 2000, 3400000, 6000000, 0x22, 0x01, 0x06, 680, 0x29A, 0x00A, 3400000, 6000000, 1, 1, 1, 2, 1, 1700000, 3000000, 0x00, 340000, 600000}
+       {170000, 300000, 2000, 3400000, 6000000, 0x22, 0x01, 0x06, 680, 0x29A, 0x00A, 3400000, 6000000, 1, 1, 1, 2, 1, 1700000, 3000000, 0x00, 340000, 600000},
+       {594000, 594000, 5000, 2970000, 2970000, 0x3C, 0x03, 0x06, 600, 0x24A, 0x00A, 5940000, 5940000, 1, 1, 1, 2, 2, 1485000, 1485000, 0x01, 297000, 297000},
+       {594000, 594000, 6250, 3712500, 3712500, 0x3C, 0x03, 0x06, 375, 0x169, 0x00A, 3712500, 3712500, 1, 1, 1, 2, 1, 1856250, 1856250, 0x00, 371250, 371250},
+       {594000, 594000, 7500, 4455000, 4455000, 0x3C, 0x03, 0x06, 450, 0x1B4, 0x00A, 4455000, 4455000, 1, 1, 1, 2, 1, 2227500, 2227500, 0x00, 445500, 445500},
 };
 
 const u32 ss28fdsoi_hdmitx_pll_tuning_table[SS28FDSOI_HDMITX_PLL_TUNING_TABLE_ROWS][SS28FDSOI_HDMITX_PLL_TUNING_TABLE_COLS] = {
@@ -97,8 +100,10 @@ const u32 ss28fdsoi_hdmitx_pll_tuning_table[SS28FDSOI_HDMITX_PLL_TUNING_TABLE_RO
        {3, 2800000, 3400000, 0x3, 0x1, 0x0, 0x04, 0x0D, 340, 0x04D},
        {3, 2800000, 3400000, 0x3, 0x1, 0x0, 0x04, 0x0D, 360, 0x04E},
        {3, 2800000, 3400000, 0x3, 0x1, 0x0, 0x04, 0x0D, 400, 0x085},
+       {4, 3400000, 3900000, 0x7, 0x1, 0x0, 0x8E, 0x2F, 375, 0x041},
        {4, 3400000, 3900000, 0x7, 0x1, 0x0, 0x8E, 0x2F, 600, 0x08D},
        {4, 3400000, 3900000, 0x7, 0x1, 0x0, 0x8E, 0x2F, 680, 0x0A6},
+       {5, 3900000, 4500000, 0x7, 0x1, 0x0, 0x8E, 0x2F, 450, 0x041},
        {5, 3900000, 4500000, 0x7, 0x1, 0x0, 0x8E, 0x2F, 600, 0x087},
        {5, 3900000, 4500000, 0x7, 0x1, 0x0, 0x8E, 0x2F, 680, 0x0A4},
        {6, 4500000, 5200000, 0x7, 0x1, 0x0, 0x04, 0x0D, 600, 0x04F},

diff --git a/drivers/gpu/drm/imx/hdp/ss28fdsoi_hdmitx_table.h b/drivers/gpu/drm/imx/hdp/ss28fdsoi_hdmitx_table.h
index 716812f..b2c2f1a 100644 (file)
--- a/drivers/gpu/drm/imx/hdp/ss28fdsoi_hdmitx_table.h
+++ b/drivers/gpu/drm/imx/hdp/ss28fdsoi_hdmitx_table.h
@@ -49,10 +49,10 @@
 
 #include <linux/io.h>
 
-# define SS28FDSOI_HDMITX_CLOCK_CONTROL_TABLE_ROWS 19
+# define SS28FDSOI_HDMITX_CLOCK_CONTROL_TABLE_ROWS 22
 # define SS28FDSOI_HDMITX_CLOCK_CONTROL_TABLE_COLS 23
 
-# define SS28FDSOI_HDMITX_PLL_TUNING_TABLE_ROWS 36
+# define SS28FDSOI_HDMITX_PLL_TUNING_TABLE_ROWS 38
 # define SS28FDSOI_HDMITX_PLL_TUNING_TABLE_COLS 10
 
 typedef enum {

diff --git a/drivers/mxc/hdp/API_DPTX.c b/drivers/mxc/hdp/API_DPTX.c
index 4bd74bd..46f4a74 100644 (file)
--- a/drivers/mxc/hdp/API_DPTX.c
+++ b/drivers/mxc/hdp/API_DPTX.c
@@ -903,6 +903,49 @@ CDN_API_STATUS CDN_API_DPTX_ForceLanes_blocking(state_struct *state,
                                 preemphasis_l3, pattern, ssc));
 }
 
+CDN_API_STATUS CDN_API_DPTX_SetPhyCoefficients(state_struct *state,
+                                               u16 mgnfsValues[4][4],
+                                               u16 cpostValues[4][4])
+{
+       if (!state->running) {
+               if (!internal_apb_available(state))
+                       return CDN_BSY;
+               internal_tx_mkfullmsg(state, MB_MODULE_ID_DP_TX, DPTX_SET_PHY_COEFFICIENTS, 20,
+                                                       2, mgnfsValues[0][0],
+                                                       2, mgnfsValues[0][1],
+                                                       2, mgnfsValues[0][2],
+                                                       2, mgnfsValues[0][3],
+                                                       2, mgnfsValues[1][0],
+                                                       2, mgnfsValues[1][1],
+                                                       2, mgnfsValues[1][2],
+                                                       2, mgnfsValues[2][0],
+                                                       2, mgnfsValues[2][1],
+                                                       2, mgnfsValues[3][0],
+                                                       2, cpostValues[0][0],
+                                                       2, cpostValues[0][1],
+                                                       2, cpostValues[0][2],
+                                                       2, cpostValues[0][3],
+                                                       2, cpostValues[1][0],
+                                                       2, cpostValues[1][1],
+                                                       2, cpostValues[1][2],
+                                                       2, cpostValues[2][0],
+                                                       2, cpostValues[2][1],
+                                                       2, cpostValues[3][0]);
+               state->bus_type = CDN_BUS_TYPE_APB;
+               return CDN_STARTED;
+       }
+       internal_process_messages(state);
+       return CDN_OK;
+}
+
+CDN_API_STATUS CDN_API_DPTX_SetPhyCoefficients_blocking(state_struct *state,
+                                                               u16 mgnfsValues[4][4],
+                                                               u16 cpostValues[4][4])
+{
+       internal_block_function(&state->mutex,
+                       CDN_API_DPTX_SetPhyCoefficients(state, mgnfsValues, cpostValues));
+}
+
 CDN_API_STATUS CDN_API_DPTX_SetDbg(state_struct *state, uint32_t dbg_cfg)
 {
        uint8_t buf[sizeof(uint32_t)];

diff --git a/drivers/mxc/hdp/API_DPTX.h b/drivers/mxc/hdp/API_DPTX.h
index 8910500..c3a9ef4 100644 (file)
--- a/drivers/mxc/hdp/API_DPTX.h
+++ b/drivers/mxc/hdp/API_DPTX.h
@@ -434,6 +434,32 @@ CDN_API_STATUS CDN_API_DPTX_ForceLanes_blocking(state_struct *state,
                                                u8 voltageSwing_l3,
                                                u8 preemphasis_l3, u8 pattern,
                                                u8 ssc);
+/**
+ * \brief Set custom PHY coefficients (values) for voltage-swing and pre-emphasis related registers.
+ * \param [in] mgnfsValues Array of values to use for TX_TXCC_MGNFS_MULT_000 registers
+ * \param [in] cpostValues Array of values to use for TX_TXCC_CPOST_MULT_00 registers
+ *
+ * Each array shall contain set of values to be used for respective PHY register
+ * (if used PHY has such registers). First index represents voltage swing,
+ * second - pre-emphasis.
+ * For example, mgnfsValues[2][0] will be used for TX_TXCC_MGNFS_MULT_000
+ * register, for voltage swing level = 2 and pre-emphasis level = 0.
+ * Similarly, cpostValues[1][2] will be used for TX_TXCC_CPOST_MULT_00 register,
+ * for voltage swing level = 1 and pre-emphasis level = 2.
+ * Default values (one that Firmware starts with) can be acquired using
+ * API_DPTX_GetDefaultCoefficients() - if applicable for given PHY.
+ * Values, where sum of indexes (for voltage swing and pre-emphasis) are
+ * greater than 3 are ignored, as such levels are forbidden by DP standard.
+ */
+CDN_API_STATUS CDN_API_DPTX_SetPhyCoefficients(state_struct *state,
+                                               u16 mgnfsValues[4][4],
+                                               u16 cpostValues[4][4]);
+/**
+ * \brief blocking version of #CDN_API_DPTX_SetPhyCoefficients
+ */
+CDN_API_STATUS CDN_API_DPTX_SetPhyCoefficients_blocking(state_struct *state,
+                                               u16 mgnfsValues[4][4],
+                                               u16 cpostValues[4][4]);
 
 /**
  * \brief Sets DP TX debug related features.

diff --git a/drivers/mxc/hdp/opcodes.h b/drivers/mxc/hdp/opcodes.h
index 0313d63..b5c3712 100644 (file)
--- a/drivers/mxc/hdp/opcodes.h
+++ b/drivers/mxc/hdp/opcodes.h
@@ -72,6 +72,7 @@
 #define DPTX_FORCE_LANES                0x10
 #define DPTX_HPD_STATE                             0x11
 #define DPTX_EDP_RATE_TRAINING          0x12
+#define DPTX_SET_PHY_COEFFICIENTS       0x13
 #define DPTX_DBG_SET                               0xF0
 #define DP_TX_OPCODE_READ_I2C_REQUEST              0xA5
 #define DP_TX_OPCODE_WRITE_I2C_REQUEST             0xA6