arm64: dts: imx8qm-mek: Enable dc0/1_dpr1_channel3 and dc0/1_dpr2_channel1-3 nodes

This patch enables dc0/1_dpr1_channel3 and dc0/1_dpr2_channel1-3 nodes
for the i.MX8QM MEK platform.

Signed-off-by: Liu Ying <victor.liu@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index e0643c8..e743e97 100755 (executable)
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -346,6 +346,22 @@
        status = "okay";
 };
 
+&dc0_dpr1_channel3 {
+       status = "okay";
+};
+
+&dc0_dpr2_channel1 {
+       status = "okay";
+};
+
+&dc0_dpr2_channel2 {
+       status = "okay";
+};
+
+&dc0_dpr2_channel3 {
+       status = "okay";
+};
+
 &dpu1 {
        status = "okay";
 };
@@ -502,6 +518,22 @@
        status = "okay";
 };
 
+&dc1_dpr1_channel3 {
+       status = "okay";
+};
+
+&dc1_dpr2_channel1 {
+       status = "okay";
+};
+
+&dc1_dpr2_channel2 {
+       status = "okay";
+};
+
+&dc1_dpr2_channel3 {
+       status = "okay";
+};
+
 &dpu2 {
        status = "okay";
 };