MLK-15985-3: ARM: dts: imx6sx: set frequency for S20_3LE format

Select a proper frequency for S20_3LE/S24_LE/S16_LE. and disable
the SSI2 when mqs enabled, for mqs only support 24.576MHz mclk.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>

diff --git a/arch/arm/boot/dts/imx6sx-sdb-mqs.dts b/arch/arm/boot/dts/imx6sx-sdb-mqs.dts
index e5ff9fb..bf388ac 100644 (file)
--- a/arch/arm/boot/dts/imx6sx-sdb-mqs.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb-mqs.dts
@@ -11,6 +11,11 @@
 
 #include "imx6sx-sdb.dts"
 / {
+
+       sound {
+               status = "disabled";
+       };
+
        sound-mqs {
                compatible = "fsl,imx6sx-sdb-mqs",
                                "fsl,imx-audio-mqs";
@@ -39,6 +44,10 @@
        status = "okay";
 };
 
+&ssi2 {
+       status = "disabled";
+};
+
 &sdma {
        gpr = <&gpr>;
        /* SDMA event remap for SAI1 */

diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi
index eaea8ff..f0e6181 100644 (file)
--- a/arch/arm/boot/dts/imx6sx-sdb.dtsi
+++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi
@@ -626,6 +626,13 @@
 };
 
 &ssi2 {
+       assigned-clocks = <&clks IMX6SX_CLK_PLL4>,
+                         <&clks IMX6SX_PLL4_BYPASS>,
+                         <&clks IMX6SX_CLK_SSI2_SEL>;
+       assigned-clock-parents = <&clks IMX6SX_CLK_OSC>,
+                                <&clks IMX6SX_CLK_PLL4>,
+                                <&clks IMX6SX_CLK_PLL4_AUDIO_DIV>;
+       assigned-clock-rates = <737280000>, <0>, <0>;
        status = "okay";
 };