MLK-15110-20 gpu: imx: dpu: fetcheco: Fixup stride when we use prefetch

When we use prefetch, we use DPR and PRG to do frame input cropping.
Thus, the stride of fetcheco is the stride of cropped frame, which means
the value of the stride is cropped_width * bytes_per_pixel.  Since the
pixel format has to be NV12 or NV21 when we use prefetch, we assume the
cropped_width stands for how many UV we have in bytes for one line, while
bytes_per_pixel should be 8bits for every U or V component.  Also, to
address TKT339017, when we use prefetch engine for fetcheco, we need to
round the stride up to the fetcheco burst size, i.e., burst length
multiplies 8 bytes.  According to TKT343664, the buffer base address has
to align to burst size, so we'll pick an appropriate burst size value in
fetcheco_source_stride().

Signed-off-by: Liu Ying <victor.liu@nxp.com>

diff --git a/drivers/gpu/drm/imx/dpu/dpu-plane.c b/drivers/gpu/drm/imx/dpu/dpu-plane.c
index fd709cf..251b59b 100644 (file)
--- a/drivers/gpu/drm/imx/dpu/dpu-plane.c
+++ b/drivers/gpu/drm/imx/dpu/dpu-plane.c
@@ -375,7 +375,8 @@ static void dpu_plane_atomic_update(struct drm_plane *plane,
                fetchdecode_pixengcfg_dynamic_src_sel(fd,
                                                (fd_dynamic_src_sel_t)fe_id);
                fetcheco_source_bpp(fe, 16);
-               fetcheco_source_stride(fe, fb->pitches[1]);
+               fetcheco_source_stride(fe, src_w, bpp, fb->pitches[1],
+                               drm_plane_state_to_uvbaseaddr(state), false);
                fetcheco_set_fmt(fe, fb->pixel_format);
                fetcheco_src_buf_dimensions(fe, src_w, src_h, fb->pixel_format);
                fetcheco_framedimensions(fe, src_w, src_h);

diff --git a/drivers/gpu/imx/dpu/dpu-fetcheco.c b/drivers/gpu/imx/dpu/dpu-fetcheco.c
index 178ecae..77ee950 100644 (file)
--- a/drivers/gpu/imx/dpu/dpu-fetcheco.c
+++ b/drivers/gpu/imx/dpu/dpu-fetcheco.c
@@ -140,10 +140,35 @@ void fetcheco_source_bpp(struct dpu_fetcheco *fe, int bpp)
 }
 EXPORT_SYMBOL_GPL(fetcheco_source_bpp);
 
-void fetcheco_source_stride(struct dpu_fetcheco *fe, int stride)
+/*
+ * The arguments width and bpp are valid only when use_prefetch is true.
+ * Since the pixel format has to be NV12 or NV21 when use_prefetch is true,
+ * we assume width stands for how many UV we have in bytes for one line,
+ * while bpp should be 8bits for every U or V component.
+ */
+void fetcheco_source_stride(struct dpu_fetcheco *fe, unsigned int width,
+                           int bpp, unsigned int stride,
+                           dma_addr_t baddr, bool use_prefetch)
 {
+       unsigned int burst_size;
        u32 val;
 
+       if (use_prefetch) {
+               /*
+                * address TKT343664:
+                * fetch unit base address has to align to burst size
+                */
+               burst_size = 1 << (ffs(baddr) - 1);
+               burst_size = min(burst_size, 128U);
+
+               stride = width * (bpp >> 3);
+               /*
+                * address TKT339017:
+                * fixup for burst size vs stride mismatch
+                */
+               stride = round_up(stride, burst_size);
+       }
+
        mutex_lock(&fe->mutex);
        val = dpu_fe_read(fe, SOURCEBUFFERATTRIBUTES0);
        val &= ~0xffff;

diff --git a/include/video/dpu.h b/include/video/dpu.h
index 36e6235..3838247 100644 (file)
--- a/include/video/dpu.h
+++ b/include/video/dpu.h
@@ -547,7 +547,9 @@ void fetcheco_set_burstlength(struct dpu_fetcheco *fe, dma_addr_t baddr,
                              bool use_prefetch);
 void fetcheco_baseaddress(struct dpu_fetcheco *fe, dma_addr_t paddr);
 void fetcheco_source_bpp(struct dpu_fetcheco *fe, int bpp);
-void fetcheco_source_stride(struct dpu_fetcheco *fe, int stride);
+void fetcheco_source_stride(struct dpu_fetcheco *fe, unsigned int width,
+                           int bpp, unsigned int stride,
+                           dma_addr_t baddr, bool use_prefetch);
 void fetcheco_src_buf_dimensions(struct dpu_fetcheco *fe, unsigned int w,
                                 unsigned int h, u32 fmt);
 void fetcheco_set_fmt(struct dpu_fetcheco *fe, u32 fmt);