LF-1187 ARM64: dts: imx8mp: add ethernet support for evk board

Add ethernet support for imx8mp evk board.

Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index ad66f12..f415c59 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -45,6 +45,26 @@
        };
 };
 
+&eqos {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_eqos>;
+       phy-mode = "rgmii-id";
+       phy-handle = <&ethphy0>;
+       status = "okay";
+
+       mdio {
+               compatible = "snps,dwmac-mdio";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               ethphy0: ethernet-phy@1 {
+                       compatible = "ethernet-phy-ieee802.3-c22";
+                       reg = <1>;
+                       eee-broken-1000t;
+               };
+       };
+};
+
 &fec {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_fec>;
@@ -124,6 +144,26 @@
 };
 
 &iomuxc {
+       pinctrl_eqos: eqosgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC             0x3
+                       MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO           0x3
+                       MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0       0x91
+                       MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1       0x91
+                       MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2       0x91
+                       MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3       0x91
+                       MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK       0x91
+                       MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91
+                       MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0       0x1f
+                       MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1       0x1f
+                       MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2       0x1f
+                       MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3       0x1f
+                       MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f
+                       MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK       0x1f
+                       MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22               0x19
+               >;
+       };
+
        pinctrl_fec: fecgrp {
                fsl,pins = <
                        MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC               0x3

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 76f410f..b466df7 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -18,6 +18,7 @@
 
        aliases {
                ethernet0 = &fec;
+               ethernet1 = &eqos;
                gpio0 = &gpio1;
                gpio1 = &gpio2;
                gpio2 = &gpio3;
@@ -329,6 +330,14 @@
                                cpu_speed_grade: speed-grade@10 {
                                        reg = <0x10 4>;
                                };
+
+                               eth_mac1: mac-address@640 {
+                                       reg = <0x90 6>;
+                               };
+
+                               eth_mac2: mac-address@650 {
+                                       reg = <0x96 6>;
+                               };
                        };
 
                        anatop: anatop@30360000 {
@@ -753,6 +762,36 @@
                                assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
                                fsl,num-tx-queues = <3>;
                                fsl,num-rx-queues = <3>;
+                               nvmem-cells = <&eth_mac1>;
+                               nvmem-cell-names = "mac-address";
+                               nvmem_macaddr_swap;
+                               stop-mode = <&gpr 0x10 3>;
+                               fsl,wakeup_irq = <2>;
+                               status = "disabled";
+                       };
+
+                       eqos: ethernet@30bf0000 {
+                               compatible = "nxp,imx8mp-dwmac-eqos", "snps,dwmac-5.10a";
+                               reg = <0x30bf0000 0x10000>;
+                               interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "eth_wake_irq", "macirq";
+                               clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,
+                                        <&clk IMX8MP_CLK_QOS_ENET_ROOT>,
+                                        <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
+                                        <&clk IMX8MP_CLK_ENET_QOS>;
+                               clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";
+                               assigned-clocks = <&clk IMX8MP_CLK_ENET_AXI>,
+                                                 <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
+                                                 <&clk IMX8MP_CLK_ENET_QOS>;
+                               assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
+                                                        <&clk IMX8MP_SYS_PLL2_100M>,
+                                                        <&clk IMX8MP_SYS_PLL2_125M>;
+                               assigned-clock-rates = <0>, <100000000>, <125000000>;
+                               nvmem-cells = <&eth_mac2>;
+                               nvmem-cell-names = "mac-address";
+                               nvmem_macaddr_swap;
+                               intf_mode = <&gpr 0x4>;
                                status = "disabled";
                        };
                };