imx6ull-somdevices.dtsi: Renamed imx6ull-somdevices.dts -> imx6ull-somdevices.dtsi.
authorJosep Orga <jorga@somdevices.com>
Thu, 16 Jan 2020 11:57:13 +0000 (12:57 +0100)
committerJosep Orga <jorga@somdevices.com>
Thu, 16 Jan 2020 11:57:13 +0000 (12:57 +0100)
imx6ull-somdevices-C0P1.dts: Added and changed Makefile.

Signed-off-by: Josep Orga <jorga@somdevices.com>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/imx6ull-somdevices-C0P1.dts [new file with mode: 0644]
arch/arm/boot/dts/imx6ull-somdevices.dts [deleted file]
arch/arm/boot/dts/imx6ull-somdevices.dtsi [new file with mode: 0644]

index 9d76f10..4629c54 100644 (file)
@@ -534,7 +534,7 @@ dtb-$(CONFIG_SOC_IMX6ULL) += \
        imx6ull-9x9-evk-btwifi.dtb \
        imx6ull-9x9-evk-btwifi-oob.dtb \
        imx6ull-9x9-evk-ldo.dtb \
-       imx6ull-somdevices.dtb
+       imx6ull-somdevices-C0P1.dtb
 dtb-$(CONFIG_SOC_IMX6SLL) += \
        imx6sll-lpddr2-arm2.dtb \
        imx6sll-lpddr3-arm2.dtb \
diff --git a/arch/arm/boot/dts/imx6ull-somdevices-C0P1.dts b/arch/arm/boot/dts/imx6ull-somdevices-C0P1.dts
new file mode 100644 (file)
index 0000000..7024142
--- /dev/null
@@ -0,0 +1,4 @@
+#define DUAL_ETH
+#define BIG_LCD
+
+#include "imx6ull-somdevices.dtsi"
diff --git a/arch/arm/boot/dts/imx6ull-somdevices.dts b/arch/arm/boot/dts/imx6ull-somdevices.dts
deleted file mode 100644 (file)
index 7928dd0..0000000
+++ /dev/null
@@ -1,738 +0,0 @@
-/*
- * Copyright (C) 2016 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-/* #define DUAL_ETH */
-/* #define BIG_LCD */
-/* #define MMC_SPI */
-/dts-v1/;
-
-#define DUAL_ETH
-#define BIG_LCD
-
-#include <dt-bindings/input/input.h>
-#include "imx6ull.dtsi"
-#include <dt-bindings/leds/common.h>
-
-/ {
-       model = "Freescale i.MX6 ULL µSMARC SOMDEVICES Board";
-       compatible = "fsl,imx6ull-somdevices", "fsl,imx6ull";
-
-       chosen {
-               stdout-path = &uart1;
-       };
-
-       memory {
-               reg = <0x80000000 0x20000000>;
-       };
-
-       reserved-memory {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
-
-               linux,cma {
-                       compatible = "shared-dma-pool";
-                       reusable;
-                       size = <0x14000000>;
-                       linux,cma-default;
-               };
-       };
-
-       backlight {
-               compatible = "pwm-backlight";
-               pwms = <&pwm3 0 2000000>;
-               brightness-levels = <0 4 8 16 32 64 128 255>;
-               default-brightness-level = <6>;
-               status = "okay";
-       };
-
-       pxp_v4l2 {
-               compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
-               status = "okay";
-       };
-
-       regulators {
-               compatible = "simple-bus";
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               reg_sd1_vmmc: regulator@1 {
-                       compatible = "regulator-fixed";
-                       regulator-name = "VSD_3V3";
-                       regulator-min-microvolt = <3300000>;
-                       regulator-max-microvolt = <3300000>;
-                       gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
-                       off-on-delay = <20000>;
-                       enable-active-high;
-               };
-
-               reg_wlan_en: regulator@10 {
-                       compatible = "regulator-fixed";
-                       pinctrl-names = "default";
-                       pinctrl-0 = <&pinctrl_wifi_en>;
-                       regulator-name = "wlan";
-                       regulator-min-microvolt = <3300000>;
-                       regulator-max-microvolt = <3300000>;
-                       regulator-boot-on;
-                       gpios = <&gpio5 7 0>;
-                       startup-delay-us = <70000>;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_led>;
-
-               led0 {
-                       label = "Heartbeat";
-                       gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
-                       linux,default-trigger = "heartbeat";
-               };
-       };
-};
-
-&cpu0 {
-       //dc-supply = <&reg_gpio_dvfs>;
-};
-
-&clks {
-       assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
-       assigned-clock-rates = <786432000>;
-};
-
-&fec1 {
-       pinctrl-names = "default";
-#ifdef DUAL_ETH
-       pinctrl-0 = <&pinctrl_enet1>;
-#else
-       pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1_mdio>;
-#endif
-       phy-mode = "rmii";
-       phy-handle = <&ethphy0>;
-       phy-reset-gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
-       phy-reset-duration = <26>;
-       phy-reset-in-suspend;
-       status = "okay";
-
-#ifndef DUAL_ETH
-       mdio {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               ethphy0: ethernet-phy@0 {
-                       compatible = "ethernet-phy-ieee802.3-c22";
-                       smsc,disable-energy-detect;
-                       reg = <0>;
-               };
-       };
-#endif
-};
-
-#ifdef DUAL_ETH
-&fec2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>;
-       phy-mode = "rmii";
-       phy-handle = <&ethphy1>;
-       phy-reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
-       phy-reset-duration = <26>;
-       phy-reset-in-suspend;
-       status = "okay";
-
-       mdio {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               ethphy0: ethernet-phy@0 {
-                       compatible = "ethernet-phy-ieee802.3-c22";
-                       smsc,disable-energy-detect;
-                       reg = <0>;
-               };
-
-               ethphy1: ethernet-phy@1 {
-                       compatible = "ethernet-phy-ieee802.3-c22";
-                       smsc,disable-energy-detect;
-                       reg = <1>;
-               };
-       };
-};
-#endif
-
-&flexcan1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_flexcan1>;
-       status = "okay";
-};
-
-&gpc {
-       fsl,cpu_pupscr_sw2iso = <0x1>;
-       fsl,cpu_pupscr_sw = <0x0>;
-       fsl,cpu_pdnscr_iso2sw = <0x1>;
-       fsl,cpu_pdnscr_iso = <0x1>;
-       fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
-};
-
-&i2c1 {
-       clock-frequency = <100000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c1>;
-       status = "okay";
-
-       pmic: pf1550@08 {
-               compatible = "fsl,pf1550";
-               interrupt-parent = <&gpio5>;
-               interrupts = <4 8>;
-               reg = <0x08>;
-               //pinctrl-0 = <&pinctrl_pf1550>;
-
-               onkey {
-                       compatible = "fsl,pf1550-onkey";
-                       linux,keycode = <KEY_POWER>;
-                       wakeup;
-               };
-
-               charger {
-                       compatible = "fsl,pf1550-charger";
-               };
-
-               regulators {
-                       compatible = "fsl,pf1550-regulator";
-
-                       sw1_reg: SW1 {
-                               regulator-name = "SW1";
-                               regulator-min-microvolt = <600000>;
-                               regulator-max-microvolt = <1387500>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                               regulator-ramp-delay = <6250>;
-                       };
-
-                       sw2_reg: SW2 {
-                               regulator-name = "SW2";
-                               regulator-min-microvolt = <600000>;
-                               regulator-max-microvolt = <1387500>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                       };
-
-                       sw3_reg: SW3 {
-                               regulator-name = "SW3";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <3300000>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                       };
-
-                       vref_reg: VREFDDR {
-                               regulator-name = "VREFDDR";
-                               regulator-min-microvolt = <1200000>;
-                               regulator-max-microvolt = <1200000>;
-                               regulator-boot-on;
-                               regulator-always-on;
-                       };
-
-                       vldo1_reg: LDO1 {
-                               regulator-name = "LDO1";
-                               regulator-min-microvolt = <750000>;
-                               regulator-max-microvolt = <3300000>;
-                               regulator-always-on;
-                       };
-
-                       vldo2_reg: LDO2 {
-                               regulator-name = "LDO2";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <3300000>;
-                               regulator-always-on;
-                       };
-
-                       vldo3_reg: LDO3 {
-                               regulator-name = "LDO3";
-                               regulator-min-microvolt = <750000>;
-                               regulator-max-microvolt = <3300000>;
-                               regulator-always-on;
-                       };
-               };
-       };
-};
-
-&ecspi2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_ecspi2>;
-       fsl,spi-num-chipselects = <1>;
-       cs-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
-       status = "okay";
-#ifndef MMC_SPI
-       spidev0: spi@0 {
-               compatible = "spidev";
-               reg = <0>;
-               spi-max-frequency = <60000000>;
-       };
-#else
-       mmc-slot@3{
-               compatible = "mmc-spi-slot";
-               spi-max-frequency = <50000000>;
-               voltage-ranges = <3300 3300>;
-               reg = <0>;
-       };
-#endif
-};
-
-&iomuxc {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_hog_1>;
-       pinctrl_hog_1: hoggrp-1 {
-               fsl,pins = <
-                       MX6UL_PAD_UART1_RTS_B__GPIO1_IO19       0x17059 /* SD1 CD */
-                       MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x17059 /* SD1 RESET */
-
-                       /* SOMDEVICES GPIOs */
-                       MX6UL_PAD_NAND_DQS__GPIO4_IO16          0x1b0b0 //GPIO00
-                       MX6UL_PAD_NAND_CE0_B__GPIO4_IO13        0x1b0b0 //GPIO01
-                       //MX6UL_PAD_GPIO1_IO01__GPIO1_IO01      0x1b0b0 //GPIO02
-                       MX6UL_PAD_LCD_RESET__GPIO3_IO04         0x1b0b0 //GPIO03
-                       MX6UL_PAD_NAND_CE1_B__GPIO4_IO14        0x1b0b0 //GPIO04
-                       MX6UL_PAD_GPIO1_IO04__GPIO1_IO04        0x1b0b0 //GPIO05
-                       MX6UL_PAD_JTAG_MOD__GPIO1_IO10          0x1b0b0 //GPIO06
-                       MX6UL_PAD_UART1_CTS_B__GPIO1_IO18       0x1b0b0 //GPIO07
-                       MX6UL_PAD_GPIO1_IO05__GPIO1_IO05        0x1b0b0 //GPIO08
-                       MX6UL_PAD_NAND_CLE__GPIO4_IO15          0x1b0b0 //GPIO09
-                       MX6UL_PAD_NAND_WP_B__GPIO4_IO11         0x1b0b0 //GPIO10
-                       MX6UL_PAD_NAND_READY_B__GPIO4_IO12      0x1b0b0 //GPIO11
-               >;
-       };
-
-       pinctrl_csi1: csi1grp {
-               fsl,pins = <
-                       MX6UL_PAD_CSI_MCLK__CSI_MCLK            0x1b088
-                       MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK        0x1b088
-                       MX6UL_PAD_CSI_VSYNC__CSI_VSYNC          0x1b088
-                       MX6UL_PAD_CSI_HSYNC__CSI_HSYNC          0x1b088
-                       MX6UL_PAD_CSI_DATA00__CSI_DATA02        0x1b088
-                       MX6UL_PAD_CSI_DATA01__CSI_DATA03        0x1b088
-                       MX6UL_PAD_CSI_DATA02__CSI_DATA04        0x1b088
-                       MX6UL_PAD_CSI_DATA03__CSI_DATA05        0x1b088
-                       MX6UL_PAD_CSI_DATA04__CSI_DATA06        0x1b088
-                       MX6UL_PAD_CSI_DATA05__CSI_DATA07        0x1b088
-                       MX6UL_PAD_CSI_DATA06__CSI_DATA08        0x1b088
-                       MX6UL_PAD_CSI_DATA07__CSI_DATA09        0x1b088
-               >;
-       };
-
-       pinctrl_enet1: enet1grp {
-               fsl,pins = <
-                       MX6UL_PAD_BOOT_MODE0__GPIO5_IO10        0x0b0b0//0x70a1
-                       MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN      0x1b0b0
-                       MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER      0x1b0b0
-                       MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
-                       MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
-                       MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN      0x1b0b0
-                       MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
-                       MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
-                       MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x4001b031
-               >;
-       };
-
-       pinctrl_enet2: enet2grp {
-               fsl,pins = <
-                       MX6UL_PAD_BOOT_MODE1__GPIO5_IO11        0x0b0b0//0x70a1
-                       MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN      0x1b0b0
-                       MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER      0x1b0b0
-                       MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
-                       MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
-                       MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN      0x1b0b0
-                       MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
-                       MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
-                       MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2  0x4001b031
-               >;
-       };
-
-       pinctrl_enet1_mdio: mdioenet1grp {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO07__ENET1_MDC         0x1b0b0
-                       MX6UL_PAD_GPIO1_IO06__ENET1_MDIO        0x1b0b0
-               >;
-       };
-
-       pinctrl_enet2_mdio: mdioenet2grp {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO07__ENET2_MDC         0x1b0b0
-                       MX6UL_PAD_GPIO1_IO06__ENET2_MDIO        0x1b0b0
-               >;
-       };
-
-       pinctrl_flexcan1: flexcan1grp{
-               fsl,pins = <
-                       MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX      0x1b020
-                       MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX      0x1b020
-               >;
-       };
-
-       pinctrl_i2c1: i2c1grp {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO02__I2C1_SCL 0x4001b8b0
-                       MX6UL_PAD_GPIO1_IO03__I2C1_SDA 0x4001b8b0
-               >;
-       };
-
-       pinctrl_lcdif_dat: lcdifdatgrp {
-               fsl,pins = <
-                       MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
-                       MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x79
-                       MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x79
-                       MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x79
-                       MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x79
-                       MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x79
-                       MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x79
-                       MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x79
-                       MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x79
-                       MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x79
-                       MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x79
-                       MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x79
-                       MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x79
-                       MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x79
-                       MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x79
-                       MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x79
-                       MX6UL_PAD_LCD_DATA16__LCDIF_DATA16  0x79
-                       MX6UL_PAD_LCD_DATA17__LCDIF_DATA17  0x79
-                       MX6UL_PAD_LCD_DATA18__LCDIF_DATA18  0x79
-                       MX6UL_PAD_LCD_DATA19__LCDIF_DATA19  0x79
-                       MX6UL_PAD_LCD_DATA20__LCDIF_DATA20  0x79
-                       MX6UL_PAD_LCD_DATA21__LCDIF_DATA21  0x79
-                       MX6UL_PAD_LCD_DATA22__LCDIF_DATA22  0x79
-                       MX6UL_PAD_LCD_DATA23__LCDIF_DATA23  0x79
-               >;
-       };
-
-       pinctrl_lcdif_ctrl: lcdifctrlgrp {
-               fsl,pins = <
-                       MX6UL_PAD_LCD_CLK__LCDIF_CLK        0x79
-                       MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x79
-                       MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x79
-                       MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x79
-               >;
-       };
-
-       pinctrl_pwm3: pwm3grp {
-               fsl,pins = <
-                       //MX6UL_PAD_GPIO1_IO04__PWM3_OUT   0x110b0
-               >;
-       };
-
-       pinctrl_sai2: sai2grp {
-               fsl,pins = <
-                       MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK        0x17088
-                       MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC        0x17088
-                       MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA     0x11088
-                       MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA        0x11088
-                       MX6UL_PAD_JTAG_TMS__SAI2_MCLK           0x17088
-               >;
-       };
-
-       pinctrl_uart1: uart1grp {
-               fsl,pins = <
-                       MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
-                       MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
-               >;
-       };
-
-       pinctrl_uart2: uart2grp {
-               fsl,pins = <
-                       MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX   0x1b0b1
-                       MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX   0x1b0b1
-                       MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS    0x1b0b1
-                       MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS    0x1b0b1
-               >;
-       };
-
-       pinctrl_uart2dte: uart2dtegrp {
-               fsl,pins = <
-                       MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX   0x1b0b1
-                       MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX   0x1b0b1
-                       MX6UL_PAD_UART2_RTS_B__UART2_DTE_CTS    0x1b0b1
-                       MX6UL_PAD_UART2_CTS_B__UART2_DTE_RTS    0x1b0b1
-               >;
-       };
-
-       pinctrl_usb_otg1_id: usbotg1idgrp {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID    0x17059
-               >;
-       };
-
-       pinctrl_usdhc1: usdhc1grp {
-               fsl,pins = <
-                       MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
-                       MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10071
-                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
-                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
-                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
-                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
-               >;
-       };
-
-       pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
-               fsl,pins = <
-                       MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
-                       MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
-                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
-                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
-                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
-                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
-               >;
-       };
-
-       pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
-               fsl,pins = <
-                       MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
-                       MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
-                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
-                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
-                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
-                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
-               >;
-       };
-
-       pinctrl_usdhc2: usdhc2grp {
-               fsl,pins = <
-                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x10069
-                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
-                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
-                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
-                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
-                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
-               >;
-       };
-
-       pinctrl_usdhc2_8bit: usdhc2grp_8bit {
-               fsl,pins = <
-                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x10069
-                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
-                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
-                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
-                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
-                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
-                       MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
-                       MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
-                       MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
-                       MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
-               >;
-       };
-
-       pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
-               fsl,pins = <
-                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100b9
-                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170b9
-                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
-                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
-                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
-                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
-                       MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
-                       MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
-                       MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
-                       MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
-               >;
-       };
-
-       pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
-               fsl,pins = <
-                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100f9
-                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170f9
-                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
-                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
-                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
-                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
-                       MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
-                       MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
-                       MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
-                       MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
-               >;
-       };
-
-       pinctrl_wdog: wdoggrp {
-               fsl,pins = <
-                       //MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
-               >;
-       };
-
-       pinctrl_ecspi2: ecspi2grp {
-               fsl,pins = <
-                       MX6UL_PAD_UART5_TX_DATA__ECSPI2_MOSI    0x0b0b0 /* CSPI_MOSI */
-                       MX6UL_PAD_UART5_RX_DATA__ECSPI2_MISO    0x0b0b0 /* CSPI_MISO */
-                       MX6UL_PAD_UART4_TX_DATA__ECSPI2_SCLK    0x0b0b0 /* CSPI_SCLK */
-                       MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29     0x0b0b0         /* CSPI_SS */
-               >;
-       };
-};
-
-&iomuxc_snvs {
-       pinctrl-names = "default_snvs";
-       pinctrl-0 = <&pinctrl_hog_2>;
-       imx6ul-evk {
-               pinctrl_hog_2: hoggrp-2 {
-                       fsl,pins = <
-                               MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00      0x80000000
-                       >;
-               };
-
-               pinctrl_wifi_en: pinctrlwifi {
-                                       fsl,pins = <
-                                                       MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06     0x10071
-                                                       MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07     0x10071
-                                       >;
-                       };
-
-               pinctrl_led: ledgrp {
-                       fsl,pins = <
-                               MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09  0x1b0b0
-                       >;
-               };
-       };
-};
-
-
-&lcdif {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_lcdif_dat
-                                &pinctrl_lcdif_ctrl>;
-       display = <&display0>;
-       status = "okay";
-
-       display0: display@0 {
-               bits-per-pixel = <16>;
-               bus-width = <24>;
-
-               display-timings {
-                       native-mode = <&timing0>;
-                       timing0: timing0 {
-                       #ifdef BIG_LCD
-                               //7INCH LCD
-                               clock-frequency = <33000000>;
-                               hactive = <800>;
-                               vactive = <480>;
-                               hfront-porch = <210>;
-                               hback-porch = <30>;
-                               hsync-len = <16>;
-                               vback-porch = <13>;
-                               vfront-porch = <22>;
-                               vsync-len = <10>;
-                       #else
-                               //4INCH LCD
-                               clock-frequency = <9000000>;
-                               hactive = <480>;
-                               vactive = <272>;
-                               hfront-porch = <2>;
-                               hback-porch = <43>;
-                               hsync-len = <0>;
-                               vback-porch = <12>;
-                               vfront-porch = <1>;
-                               vsync-len = <0>;
-                       #endif
-
-                               hsync-active = <0>;
-                               vsync-active = <0>;
-                               de-active = <1>;
-                               pixelclk-active = <0>;
-                       };
-               };
-       };
-};
-
-&pwm3 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_pwm3>;
-       status = "okay";
-};
-
-&pxp {
-       status = "okay";
-};
-
-&uart1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart1>;
-       status = "okay";
-};
-
-&uart2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart2>;
-       fsl,uart-has-rtscts;
-       /* for DTE mode, add below change */
-       /* fsl,dte-mode; */
-       /* pinctrl-0 = <&pinctrl_uart2dte>; */
-       status = "okay";
-};
-
-&usbotg1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usb_otg1_id>;
-       dr_mode = "otg";
-       srp-disable;
-       hnp-disable;
-       adp-disable;
-       status = "okay";
-};
-
-&usbotg2 {
-       dr_mode = "host";
-       disable-over-current;
-       status = "okay";
-};
-
-&usbphy1 {
-       tx-d-cal = <0x5>;
-};
-
-&usbphy2 {
-       tx-d-cal = <0x5>;
-};
-
-&usdhc1 {
-       /*pinctrl-names = "default", "state_100mhz", "state_200mhz";
-       pinctrl-0 = <&pinctrl_usdhc1>;
-       pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
-       pinctrl-2 = <&pinctrl_usdhc1_200mhz>;*/
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usdhc1>;
-       //cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
-       //no-1-8-v;
-       keep-power-in-suspend;
-       enable-sdio-wakeup;
-       non-removable;
-       wifi-host;
-       //vmmc-supply = <&reg_sd1_vmmc>;
-       //vmmc-supply = <&reg_wlan_en>;
-       bus-width = <4>;
-       status = "okay";
-       wilc_sdio: wilc_sdio@0{
-               compatible = "microchip,wilc1000";
-               pinctrl-0 = <&pinctrl_wifi_en>;
-               status = "okay";
-                       //interrupts = <5 IRQ_TYPE_EDGE_RISING>;
-                       //gpio_irq = <&gpio5 5 0>;
-               gpio_reset = <&gpio5 7 0>;
-               //reset-gpios = <&gpio5 7 0>;
-               gpio_chip_en = <&gpio5 6 0>;
-               //chip_en-gpios = <&gpio5 6 0>;
-               reg = <0>;
-               bus-width = <4>;
-       };
-};
-
-&usdhc2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usdhc2>;
-       non-removable;
-       status = "okay";
-};
-
-&wdog1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_wdog>;
-       fsl,ext-reset-output;
-};
diff --git a/arch/arm/boot/dts/imx6ull-somdevices.dtsi b/arch/arm/boot/dts/imx6ull-somdevices.dtsi
new file mode 100644 (file)
index 0000000..7928dd0
--- /dev/null
@@ -0,0 +1,738 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/* #define DUAL_ETH */
+/* #define BIG_LCD */
+/* #define MMC_SPI */
+/dts-v1/;
+
+#define DUAL_ETH
+#define BIG_LCD
+
+#include <dt-bindings/input/input.h>
+#include "imx6ull.dtsi"
+#include <dt-bindings/leds/common.h>
+
+/ {
+       model = "Freescale i.MX6 ULL µSMARC SOMDEVICES Board";
+       compatible = "fsl,imx6ull-somdevices", "fsl,imx6ull";
+
+       chosen {
+               stdout-path = &uart1;
+       };
+
+       memory {
+               reg = <0x80000000 0x20000000>;
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               linux,cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x14000000>;
+                       linux,cma-default;
+               };
+       };
+
+       backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm3 0 2000000>;
+               brightness-levels = <0 4 8 16 32 64 128 255>;
+               default-brightness-level = <6>;
+               status = "okay";
+       };
+
+       pxp_v4l2 {
+               compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
+               status = "okay";
+       };
+
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reg_sd1_vmmc: regulator@1 {
+                       compatible = "regulator-fixed";
+                       regulator-name = "VSD_3V3";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+                       off-on-delay = <20000>;
+                       enable-active-high;
+               };
+
+               reg_wlan_en: regulator@10 {
+                       compatible = "regulator-fixed";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_wifi_en>;
+                       regulator-name = "wlan";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-boot-on;
+                       gpios = <&gpio5 7 0>;
+                       startup-delay-us = <70000>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_led>;
+
+               led0 {
+                       label = "Heartbeat";
+                       gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "heartbeat";
+               };
+       };
+};
+
+&cpu0 {
+       //dc-supply = <&reg_gpio_dvfs>;
+};
+
+&clks {
+       assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
+       assigned-clock-rates = <786432000>;
+};
+
+&fec1 {
+       pinctrl-names = "default";
+#ifdef DUAL_ETH
+       pinctrl-0 = <&pinctrl_enet1>;
+#else
+       pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1_mdio>;
+#endif
+       phy-mode = "rmii";
+       phy-handle = <&ethphy0>;
+       phy-reset-gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
+       phy-reset-duration = <26>;
+       phy-reset-in-suspend;
+       status = "okay";
+
+#ifndef DUAL_ETH
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               ethphy0: ethernet-phy@0 {
+                       compatible = "ethernet-phy-ieee802.3-c22";
+                       smsc,disable-energy-detect;
+                       reg = <0>;
+               };
+       };
+#endif
+};
+
+#ifdef DUAL_ETH
+&fec2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>;
+       phy-mode = "rmii";
+       phy-handle = <&ethphy1>;
+       phy-reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
+       phy-reset-duration = <26>;
+       phy-reset-in-suspend;
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               ethphy0: ethernet-phy@0 {
+                       compatible = "ethernet-phy-ieee802.3-c22";
+                       smsc,disable-energy-detect;
+                       reg = <0>;
+               };
+
+               ethphy1: ethernet-phy@1 {
+                       compatible = "ethernet-phy-ieee802.3-c22";
+                       smsc,disable-energy-detect;
+                       reg = <1>;
+               };
+       };
+};
+#endif
+
+&flexcan1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan1>;
+       status = "okay";
+};
+
+&gpc {
+       fsl,cpu_pupscr_sw2iso = <0x1>;
+       fsl,cpu_pupscr_sw = <0x0>;
+       fsl,cpu_pdnscr_iso2sw = <0x1>;
+       fsl,cpu_pdnscr_iso = <0x1>;
+       fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
+};
+
+&i2c1 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+       pmic: pf1550@08 {
+               compatible = "fsl,pf1550";
+               interrupt-parent = <&gpio5>;
+               interrupts = <4 8>;
+               reg = <0x08>;
+               //pinctrl-0 = <&pinctrl_pf1550>;
+
+               onkey {
+                       compatible = "fsl,pf1550-onkey";
+                       linux,keycode = <KEY_POWER>;
+                       wakeup;
+               };
+
+               charger {
+                       compatible = "fsl,pf1550-charger";
+               };
+
+               regulators {
+                       compatible = "fsl,pf1550-regulator";
+
+                       sw1_reg: SW1 {
+                               regulator-name = "SW1";
+                               regulator-min-microvolt = <600000>;
+                               regulator-max-microvolt = <1387500>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <6250>;
+                       };
+
+                       sw2_reg: SW2 {
+                               regulator-name = "SW2";
+                               regulator-min-microvolt = <600000>;
+                               regulator-max-microvolt = <1387500>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       sw3_reg: SW3 {
+                               regulator-name = "SW3";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       vref_reg: VREFDDR {
+                               regulator-name = "VREFDDR";
+                               regulator-min-microvolt = <1200000>;
+                               regulator-max-microvolt = <1200000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       vldo1_reg: LDO1 {
+                               regulator-name = "LDO1";
+                               regulator-min-microvolt = <750000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vldo2_reg: LDO2 {
+                               regulator-name = "LDO2";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vldo3_reg: LDO3 {
+                               regulator-name = "LDO3";
+                               regulator-min-microvolt = <750000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+               };
+       };
+};
+
+&ecspi2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi2>;
+       fsl,spi-num-chipselects = <1>;
+       cs-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+#ifndef MMC_SPI
+       spidev0: spi@0 {
+               compatible = "spidev";
+               reg = <0>;
+               spi-max-frequency = <60000000>;
+       };
+#else
+       mmc-slot@3{
+               compatible = "mmc-spi-slot";
+               spi-max-frequency = <50000000>;
+               voltage-ranges = <3300 3300>;
+               reg = <0>;
+       };
+#endif
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hog_1>;
+       pinctrl_hog_1: hoggrp-1 {
+               fsl,pins = <
+                       MX6UL_PAD_UART1_RTS_B__GPIO1_IO19       0x17059 /* SD1 CD */
+                       MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x17059 /* SD1 RESET */
+
+                       /* SOMDEVICES GPIOs */
+                       MX6UL_PAD_NAND_DQS__GPIO4_IO16          0x1b0b0 //GPIO00
+                       MX6UL_PAD_NAND_CE0_B__GPIO4_IO13        0x1b0b0 //GPIO01
+                       //MX6UL_PAD_GPIO1_IO01__GPIO1_IO01      0x1b0b0 //GPIO02
+                       MX6UL_PAD_LCD_RESET__GPIO3_IO04         0x1b0b0 //GPIO03
+                       MX6UL_PAD_NAND_CE1_B__GPIO4_IO14        0x1b0b0 //GPIO04
+                       MX6UL_PAD_GPIO1_IO04__GPIO1_IO04        0x1b0b0 //GPIO05
+                       MX6UL_PAD_JTAG_MOD__GPIO1_IO10          0x1b0b0 //GPIO06
+                       MX6UL_PAD_UART1_CTS_B__GPIO1_IO18       0x1b0b0 //GPIO07
+                       MX6UL_PAD_GPIO1_IO05__GPIO1_IO05        0x1b0b0 //GPIO08
+                       MX6UL_PAD_NAND_CLE__GPIO4_IO15          0x1b0b0 //GPIO09
+                       MX6UL_PAD_NAND_WP_B__GPIO4_IO11         0x1b0b0 //GPIO10
+                       MX6UL_PAD_NAND_READY_B__GPIO4_IO12      0x1b0b0 //GPIO11
+               >;
+       };
+
+       pinctrl_csi1: csi1grp {
+               fsl,pins = <
+                       MX6UL_PAD_CSI_MCLK__CSI_MCLK            0x1b088
+                       MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK        0x1b088
+                       MX6UL_PAD_CSI_VSYNC__CSI_VSYNC          0x1b088
+                       MX6UL_PAD_CSI_HSYNC__CSI_HSYNC          0x1b088
+                       MX6UL_PAD_CSI_DATA00__CSI_DATA02        0x1b088
+                       MX6UL_PAD_CSI_DATA01__CSI_DATA03        0x1b088
+                       MX6UL_PAD_CSI_DATA02__CSI_DATA04        0x1b088
+                       MX6UL_PAD_CSI_DATA03__CSI_DATA05        0x1b088
+                       MX6UL_PAD_CSI_DATA04__CSI_DATA06        0x1b088
+                       MX6UL_PAD_CSI_DATA05__CSI_DATA07        0x1b088
+                       MX6UL_PAD_CSI_DATA06__CSI_DATA08        0x1b088
+                       MX6UL_PAD_CSI_DATA07__CSI_DATA09        0x1b088
+               >;
+       };
+
+       pinctrl_enet1: enet1grp {
+               fsl,pins = <
+                       MX6UL_PAD_BOOT_MODE0__GPIO5_IO10        0x0b0b0//0x70a1
+                       MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN      0x1b0b0
+                       MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER      0x1b0b0
+                       MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+                       MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+                       MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN      0x1b0b0
+                       MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+                       MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+                       MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x4001b031
+               >;
+       };
+
+       pinctrl_enet2: enet2grp {
+               fsl,pins = <
+                       MX6UL_PAD_BOOT_MODE1__GPIO5_IO11        0x0b0b0//0x70a1
+                       MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN      0x1b0b0
+                       MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER      0x1b0b0
+                       MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
+                       MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
+                       MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN      0x1b0b0
+                       MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
+                       MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
+                       MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2  0x4001b031
+               >;
+       };
+
+       pinctrl_enet1_mdio: mdioenet1grp {
+               fsl,pins = <
+                       MX6UL_PAD_GPIO1_IO07__ENET1_MDC         0x1b0b0
+                       MX6UL_PAD_GPIO1_IO06__ENET1_MDIO        0x1b0b0
+               >;
+       };
+
+       pinctrl_enet2_mdio: mdioenet2grp {
+               fsl,pins = <
+                       MX6UL_PAD_GPIO1_IO07__ENET2_MDC         0x1b0b0
+                       MX6UL_PAD_GPIO1_IO06__ENET2_MDIO        0x1b0b0
+               >;
+       };
+
+       pinctrl_flexcan1: flexcan1grp{
+               fsl,pins = <
+                       MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX      0x1b020
+                       MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX      0x1b020
+               >;
+       };
+
+       pinctrl_i2c1: i2c1grp {
+               fsl,pins = <
+                       MX6UL_PAD_GPIO1_IO02__I2C1_SCL 0x4001b8b0
+                       MX6UL_PAD_GPIO1_IO03__I2C1_SDA 0x4001b8b0
+               >;
+       };
+
+       pinctrl_lcdif_dat: lcdifdatgrp {
+               fsl,pins = <
+                       MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
+                       MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x79
+                       MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x79
+                       MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x79
+                       MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x79
+                       MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x79
+                       MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x79
+                       MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x79
+                       MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x79
+                       MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x79
+                       MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x79
+                       MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x79
+                       MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x79
+                       MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x79
+                       MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x79
+                       MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x79
+                       MX6UL_PAD_LCD_DATA16__LCDIF_DATA16  0x79
+                       MX6UL_PAD_LCD_DATA17__LCDIF_DATA17  0x79
+                       MX6UL_PAD_LCD_DATA18__LCDIF_DATA18  0x79
+                       MX6UL_PAD_LCD_DATA19__LCDIF_DATA19  0x79
+                       MX6UL_PAD_LCD_DATA20__LCDIF_DATA20  0x79
+                       MX6UL_PAD_LCD_DATA21__LCDIF_DATA21  0x79
+                       MX6UL_PAD_LCD_DATA22__LCDIF_DATA22  0x79
+                       MX6UL_PAD_LCD_DATA23__LCDIF_DATA23  0x79
+               >;
+       };
+
+       pinctrl_lcdif_ctrl: lcdifctrlgrp {
+               fsl,pins = <
+                       MX6UL_PAD_LCD_CLK__LCDIF_CLK        0x79
+                       MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x79
+                       MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x79
+                       MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x79
+               >;
+       };
+
+       pinctrl_pwm3: pwm3grp {
+               fsl,pins = <
+                       //MX6UL_PAD_GPIO1_IO04__PWM3_OUT   0x110b0
+               >;
+       };
+
+       pinctrl_sai2: sai2grp {
+               fsl,pins = <
+                       MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK        0x17088
+                       MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC        0x17088
+                       MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA     0x11088
+                       MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA        0x11088
+                       MX6UL_PAD_JTAG_TMS__SAI2_MCLK           0x17088
+               >;
+       };
+
+       pinctrl_uart1: uart1grp {
+               fsl,pins = <
+                       MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+                       MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+               >;
+       };
+
+       pinctrl_uart2: uart2grp {
+               fsl,pins = <
+                       MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX   0x1b0b1
+                       MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX   0x1b0b1
+                       MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS    0x1b0b1
+                       MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS    0x1b0b1
+               >;
+       };
+
+       pinctrl_uart2dte: uart2dtegrp {
+               fsl,pins = <
+                       MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX   0x1b0b1
+                       MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX   0x1b0b1
+                       MX6UL_PAD_UART2_RTS_B__UART2_DTE_CTS    0x1b0b1
+                       MX6UL_PAD_UART2_CTS_B__UART2_DTE_RTS    0x1b0b1
+               >;
+       };
+
+       pinctrl_usb_otg1_id: usbotg1idgrp {
+               fsl,pins = <
+                       MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID    0x17059
+               >;
+       };
+
+       pinctrl_usdhc1: usdhc1grp {
+               fsl,pins = <
+                       MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
+                       MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10071
+                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
+                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
+                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
+                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
+               >;
+       };
+
+       pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+               fsl,pins = <
+                       MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
+                       MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
+                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
+                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
+                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
+                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
+               >;
+       };
+
+       pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+               fsl,pins = <
+                       MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
+                       MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
+                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
+                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
+                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
+                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
+               >;
+       };
+
+       pinctrl_usdhc2: usdhc2grp {
+               fsl,pins = <
+                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x10069
+                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
+                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+               >;
+       };
+
+       pinctrl_usdhc2_8bit: usdhc2grp_8bit {
+               fsl,pins = <
+                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x10069
+                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
+                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+                       MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
+                       MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
+                       MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
+                       MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
+               >;
+       };
+
+       pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
+               fsl,pins = <
+                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100b9
+                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170b9
+                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
+                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
+                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
+                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
+                       MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
+                       MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
+                       MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
+                       MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
+               >;
+       };
+
+       pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
+               fsl,pins = <
+                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100f9
+                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170f9
+                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
+                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
+                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
+                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
+                       MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
+                       MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
+                       MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
+                       MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
+               >;
+       };
+
+       pinctrl_wdog: wdoggrp {
+               fsl,pins = <
+                       //MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
+               >;
+       };
+
+       pinctrl_ecspi2: ecspi2grp {
+               fsl,pins = <
+                       MX6UL_PAD_UART5_TX_DATA__ECSPI2_MOSI    0x0b0b0 /* CSPI_MOSI */
+                       MX6UL_PAD_UART5_RX_DATA__ECSPI2_MISO    0x0b0b0 /* CSPI_MISO */
+                       MX6UL_PAD_UART4_TX_DATA__ECSPI2_SCLK    0x0b0b0 /* CSPI_SCLK */
+                       MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29     0x0b0b0         /* CSPI_SS */
+               >;
+       };
+};
+
+&iomuxc_snvs {
+       pinctrl-names = "default_snvs";
+       pinctrl-0 = <&pinctrl_hog_2>;
+       imx6ul-evk {
+               pinctrl_hog_2: hoggrp-2 {
+                       fsl,pins = <
+                               MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00      0x80000000
+                       >;
+               };
+
+               pinctrl_wifi_en: pinctrlwifi {
+                                       fsl,pins = <
+                                                       MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06     0x10071
+                                                       MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07     0x10071
+                                       >;
+                       };
+
+               pinctrl_led: ledgrp {
+                       fsl,pins = <
+                               MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09  0x1b0b0
+                       >;
+               };
+       };
+};
+
+
+&lcdif {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lcdif_dat
+                                &pinctrl_lcdif_ctrl>;
+       display = <&display0>;
+       status = "okay";
+
+       display0: display@0 {
+               bits-per-pixel = <16>;
+               bus-width = <24>;
+
+               display-timings {
+                       native-mode = <&timing0>;
+                       timing0: timing0 {
+                       #ifdef BIG_LCD
+                               //7INCH LCD
+                               clock-frequency = <33000000>;
+                               hactive = <800>;
+                               vactive = <480>;
+                               hfront-porch = <210>;
+                               hback-porch = <30>;
+                               hsync-len = <16>;
+                               vback-porch = <13>;
+                               vfront-porch = <22>;
+                               vsync-len = <10>;
+                       #else
+                               //4INCH LCD
+                               clock-frequency = <9000000>;
+                               hactive = <480>;
+                               vactive = <272>;
+                               hfront-porch = <2>;
+                               hback-porch = <43>;
+                               hsync-len = <0>;
+                               vback-porch = <12>;
+                               vfront-porch = <1>;
+                               vsync-len = <0>;
+                       #endif
+
+                               hsync-active = <0>;
+                               vsync-active = <0>;
+                               de-active = <1>;
+                               pixelclk-active = <0>;
+                       };
+               };
+       };
+};
+
+&pwm3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm3>;
+       status = "okay";
+};
+
+&pxp {
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       fsl,uart-has-rtscts;
+       /* for DTE mode, add below change */
+       /* fsl,dte-mode; */
+       /* pinctrl-0 = <&pinctrl_uart2dte>; */
+       status = "okay";
+};
+
+&usbotg1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usb_otg1_id>;
+       dr_mode = "otg";
+       srp-disable;
+       hnp-disable;
+       adp-disable;
+       status = "okay";
+};
+
+&usbotg2 {
+       dr_mode = "host";
+       disable-over-current;
+       status = "okay";
+};
+
+&usbphy1 {
+       tx-d-cal = <0x5>;
+};
+
+&usbphy2 {
+       tx-d-cal = <0x5>;
+};
+
+&usdhc1 {
+       /*pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc1_200mhz>;*/
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       //cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+       //no-1-8-v;
+       keep-power-in-suspend;
+       enable-sdio-wakeup;
+       non-removable;
+       wifi-host;
+       //vmmc-supply = <&reg_sd1_vmmc>;
+       //vmmc-supply = <&reg_wlan_en>;
+       bus-width = <4>;
+       status = "okay";
+       wilc_sdio: wilc_sdio@0{
+               compatible = "microchip,wilc1000";
+               pinctrl-0 = <&pinctrl_wifi_en>;
+               status = "okay";
+                       //interrupts = <5 IRQ_TYPE_EDGE_RISING>;
+                       //gpio_irq = <&gpio5 5 0>;
+               gpio_reset = <&gpio5 7 0>;
+               //reset-gpios = <&gpio5 7 0>;
+               gpio_chip_en = <&gpio5 6 0>;
+               //chip_en-gpios = <&gpio5 6 0>;
+               reg = <0>;
+               bus-width = <4>;
+       };
+};
+
+&usdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       non-removable;
+       status = "okay";
+};
+
+&wdog1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_wdog>;
+       fsl,ext-reset-output;
+};