ARM: dts: imx7d-sdb: move pin LPSR_GPIO1_IO04 to iomuxc_lpsr
authorFugang Duan <fugang.duan@nxp.com>
Fri, 25 Oct 2019 12:29:25 +0000 (20:29 +0800)
committerDong Aisheng <aisheng.dong@nxp.com>
Mon, 14 Dec 2020 03:20:21 +0000 (11:20 +0800)
PIN LPSR_GPIO1_IO04 is LPSR pin, then move it to iomuxc_lpsr
node. And remove the dummy pin group for the PIN.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
arch/arm/boot/dts/imx7d-sdb.dts

index 120b86e..711e595 100644 (file)
 
 &fec2 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_epdc0_en>;
-       pinctrl-assert-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&pinctrl_enet2>;
        assigned-clocks = <&clks IMX7D_ENET_PHY_REF_ROOT_SRC>,
                          <&clks IMX7D_ENET_AXI_ROOT_SRC>,
                          <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
                        >;
                };
 
-               pinctrl_enet2_epdc0_en: enet2_epdc0_grp {
-                       fsl,pins = <
-                               MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4     0x80000000
-                       >;
-               };
-
-               pinctrl_enet2_reg: enet2reggrp {
-                       fsl,pins = <
-                               MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4     0x80000000
-                       >;
-               };
-
                pinctrl_epdc0: epdcgrp0 {
                        fsl,pins = <
                                MX7D_PAD_EPDC_DATA00__EPDC_DATA0  0x2
 };
 
 &iomuxc_lpsr {
+       pinctrl_enet2_reg: enet2reggrp {
+               fsl,pins = <
+                       MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4     0x80000000
+               >;
+       };
+
        pinctrl_wdog: wdoggrp {
                fsl,pins = <
                        MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B          0x74