imx6ull-somdevices.dts: Removed not used peripherals flexcan2, spi4, qspi, tsc and...

Signed-off-by: Josep Orga <jorga@somdevices.com>

diff --git a/arch/arm/boot/dts/imx6ull-somdevices.dts b/arch/arm/boot/dts/imx6ull-somdevices.dts
index a380139..021f05a 100644 (file)
--- a/arch/arm/boot/dts/imx6ull-somdevices.dts
+++ b/arch/arm/boot/dts/imx6ull-somdevices.dts
@@ -56,15 +56,6 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               reg_can_3v3: regulator@0 {
-                       compatible = "regulator-fixed";
-                       reg = <0>;
-                       regulator-name = "can-3v3";
-                       regulator-min-microvolt = <3300000>;
-                       regulator-max-microvolt = <3300000>;
-                       gpios = <&gpio_spi 3 GPIO_ACTIVE_LOW>;
-               };
-
                reg_sd1_vmmc: regulator@1 {
                        compatible = "regulator-fixed";
                        regulator-name = "VSD_3V3";
@@ -75,18 +66,6 @@
                        enable-active-high;
                };
 
-               reg_gpio_dvfs: regulator-gpio {
-                       compatible = "regulator-gpio";
-                       pinctrl-names = "default";
-                       pinctrl-0 = <&pinctrl_dvfs>;
-                       regulator-min-microvolt = <1300000>;
-                       regulator-max-microvolt = <1400000>;
-                       regulator-name = "gpio_dvfs";
-                       regulator-type = "voltage";
-                       gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
-                       states = <1300000 0x1 1400000 0x0>;
-               };
-
                reg_wlan_en: regulator@10 {
                        compatible = "regulator-fixed";
                        pinctrl-names = "default";
@@ -99,34 +78,10 @@
                        startup-delay-us = <70000>;
                };
        };
-
-       spi4 {
-               compatible = "spi-gpio";
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_spi4>;
-               pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
-               status = "okay";
-               gpio-sck = <&gpio5 11 0>;
-               gpio-mosi = <&gpio5 10 0>;
-               cs-gpios = <&gpio5 7 0>;
-               num-chipselects = <1>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               gpio_spi: gpio_spi@0 {
-                       compatible = "fairchild,74hc595";
-                       gpio-controller;
-                       #gpio-cells = <2>;
-                       reg = <0>;
-                       registers-number = <1>;
-                       registers-default = /bits/ 8 <0x57>;
-                       spi-max-frequency = <100000>;
-               };
-       };
 };
 
 &cpu0 {
-       dc-supply = <&reg_gpio_dvfs>;
+       //dc-supply = <&reg_gpio_dvfs>;
 };
 
 &clks {
@@ -195,14 +150,6 @@
 &flexcan1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_flexcan1>;
-       xceiver-supply = <&reg_can_3v3>;
-       status = "okay";
-};
-
-&flexcan2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_flexcan2>;
-       xceiver-supply = <&reg_can_3v3>;
        status = "okay";
 };
 
@@ -374,13 +321,6 @@
                >;
        };
 
-       pinctrl_flexcan2: flexcan2grp{
-               fsl,pins = <
-                       MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX      0x1b020
-                       MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX      0x1b020
-               >;
-       };
-
        pinctrl_i2c1: i2c1grp {
                fsl,pins = <
                        MX6UL_PAD_GPIO1_IO02__I2C1_SCL 0x4001b8b0
@@ -432,17 +372,6 @@
                >;
        };
 
-       pinctrl_qspi: qspigrp {
-               fsl,pins = <
-                       MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK      0x70a1
-                       MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a1
-                       MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01   0x70a1
-                       MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02   0x70a1
-                       MX6UL_PAD_NAND_CLE__QSPI_A_DATA03     0x70a1
-                       MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B      0x70a1
-               >;
-       };
-
        pinctrl_sai2: sai2grp {
                fsl,pins = <
                        MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK        0x17088
@@ -453,15 +382,6 @@
                >;
        };
 
-       pinctrl_tsc: tscgrp {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO01__GPIO1_IO01        0xb0
-                       MX6UL_PAD_GPIO1_IO02__GPIO1_IO02        0xb0
-                       MX6UL_PAD_GPIO1_IO03__GPIO1_IO03        0xb0
-                       MX6UL_PAD_GPIO1_IO04__GPIO1_IO04        0xb0
-               >;
-       };
-
        pinctrl_uart1: uart1grp {
                fsl,pins = <
                        MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
@@ -594,38 +514,18 @@
         pinctrl-0 = <&pinctrl_hog_2>;
         imx6ul-evk {
                pinctrl_hog_2: hoggrp-2 {
-                        fsl,pins = <
-                                MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00      0x80000000
-                        >;
-                };
-
-               pinctrl_dvfs: dvfsgrp {
-                        fsl,pins = <
-                                MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03      0x79
-                        >;
-                };
-               
+                       fsl,pins = <
+                               MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00      0x80000000
+                       >;
+               };
+
                pinctrl_lcdif_reset: lcdifresetgrp {
-                        fsl,pins = <
-                                /* used for lcd reset */
-                                MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09  0x79
-                        >;
-                };
-
-               pinctrl_spi4: spi4grp {
-                        fsl,pins = <
-                                MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10        0x70a1
-                                MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11        0x70a1
-                                MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07      0x70a1
-                                MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08      0x80000000
-                        >;
-                };
-
-                pinctrl_sai2_hp_det_b: sai2_hp_det_grp {
-                        fsl,pins = <
-                                MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04   0x17059
-                        >;
-                };
+                       fsl,pins = <
+                               /* used for lcd reset */
+                               MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09  0x79
+                       >;
+               };
+
                pinctrl_wifi_en: pinctrlwifi {
                                        fsl,pins = <
                                                        MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06     0x10071
@@ -680,44 +580,6 @@
        status = "okay";
 };
 
-&qspi {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_qspi>;
-       status = "okay";
-       ddrsmp=<0>;
-
-       flash0: n25q256a@0 {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               compatible = "micron,n25q256a";
-               spi-max-frequency = <29000000>;
-               spi-nor,ddr-quad-read-dummy = <6>;
-               reg = <0>;
-       };
-};
-
-&sai2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_sai2
-                    &pinctrl_sai2_hp_det_b>;
-
-       assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
-                         <&clks IMX6UL_CLK_SAI2>;
-       assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
-       assigned-clock-rates = <0>, <12288000>;
-
-       status = "okay";
-};
-
-&tsc {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_tsc>;
-       xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
-       measure-delay-time = <0xffff>;
-       pre-charge-time = <0xfff>;
-       status = "okay";
-};
-
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart1>;
@@ -759,35 +621,35 @@
 };
 
 &usdhc1 {
-    /*pinctrl-names = "default", "state_100mhz", "state_200mhz";
-    pinctrl-0 = <&pinctrl_usdhc1>;
-    pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
-    pinctrl-2 = <&pinctrl_usdhc1_200mhz>;*/
-    pinctrl-names = "default";
-    pinctrl-0 = <&pinctrl_usdhc1>;
-    //cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
-    //no-1-8-v;
-    keep-power-in-suspend;
-    enable-sdio-wakeup;
-    non-removable;
-    wifi-host;
-    //vmmc-supply = <&reg_sd1_vmmc>;
-    //vmmc-supply = <&reg_wlan_en>;
-    bus-width = <4>;
-    status = "okay";
-    wilc_sdio: wilc_sdio@0{
-        compatible = "microchip,wilc1000";
-        pinctrl-0 = <&pinctrl_wifi_en>;
-        status = "okay";
-                //interrupts = <5 IRQ_TYPE_EDGE_RISING>;
-                //gpio_irq = <&gpio5 5 0>;
-        gpio_reset = <&gpio5 7 0>;
-        //reset-gpios = <&gpio5 7 0>;
-        gpio_chip_en = <&gpio5 6 0>;
-        //chip_en-gpios = <&gpio5 6 0>;
-        reg = <0>;
-        bus-width = <4>;
-    };
+       /*pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc1_200mhz>;*/
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       //cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+       //no-1-8-v;
+       keep-power-in-suspend;
+       enable-sdio-wakeup;
+       non-removable;
+       wifi-host;
+       //vmmc-supply = <&reg_sd1_vmmc>;
+       //vmmc-supply = <&reg_wlan_en>;
+       bus-width = <4>;
+       status = "okay";
+       wilc_sdio: wilc_sdio@0{
+               compatible = "microchip,wilc1000";
+               pinctrl-0 = <&pinctrl_wifi_en>;
+               status = "okay";
+                       //interrupts = <5 IRQ_TYPE_EDGE_RISING>;
+                       //gpio_irq = <&gpio5 5 0>;
+               gpio_reset = <&gpio5 7 0>;
+               //reset-gpios = <&gpio5 7 0>;
+               gpio_chip_en = <&gpio5 6 0>;
+               //chip_en-gpios = <&gpio5 6 0>;
+               reg = <0>;
+               bus-width = <4>;
+       };
 };
 
 &usdhc2 {