MLK-20170: mtd: flexspi: change the flexspi dummy pad settings

The dummy pad settings should be align with data access mode, such as
set to PAD4 for all Quad read.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>

diff --git a/drivers/mtd/spi-nor/fsl-flexspi.c b/drivers/mtd/spi-nor/fsl-flexspi.c
index 6dd369f..8b1310f 100644 (file)
--- a/drivers/mtd/spi-nor/fsl-flexspi.c
+++ b/drivers/mtd/spi-nor/fsl-flexspi.c
@@ -533,8 +533,8 @@ static void fsl_flexspi_init_lut(struct fsl_flexspi *flex)
                writel(LUT0(CMD, PAD1, op) | LUT1(ADDR, PAD1, addrlen),
                       base + FLEXSPI_LUT(lut_base));
 
-               writel(LUT0(DUMMY, PAD1, dm) |
-                      LUT1(FSL_READ, PAD4, rxfifo),
+               writel(LUT0(DUMMY, PAD4, dm) |
+                      LUT1(FSL_READ, PAD4, 0),
                       base + FLEXSPI_LUT(lut_base + 1));
        /* DDR Quad I/O Read     */
        } else if (op == SPINOR_OP_READ_1_4_4_DTR || op == SPINOR_OP_READ_1_4_4_DTR_4B) {
@@ -544,7 +544,7 @@ static void fsl_flexspi_init_lut(struct fsl_flexspi *flex)
                       base + FLEXSPI_LUT(lut_base));
 
                writel(LUT0(MODE_DDR, PAD4, 0xff) |
-                      LUT1(DUMMY, PAD1, dm),
+                      LUT1(DUMMY, PAD4, dm),
                       base + FLEXSPI_LUT(lut_base + 1));
 
                writel(LUT0(READ_DDR, PAD4, rxfifo) |