#include <asm/arch/sys_proto.h>
#include <asm/arch/mx7ulp-pins.h>
#include <asm/arch/iomux.h>
+#include <asm/gpio.h>
+#include <usb.h>
+#include <dm.h>
DECLARE_GLOBAL_DATA_PTR;
#define UART_PAD_CTRL (PAD_CTL_PUS_UP)
#define QSPI_PAD_CTRL1 (PAD_CTL_PUS_UP | PAD_CTL_DSE)
+#define OTG_ID_GPIO_PAD_CTRL (PAD_CTL_IBE_ENABLE)
int dram_init(void)
{
}
#endif
+#ifdef CONFIG_DM_USB
+static iomux_cfg_t const usb_otg1_pads[] = {
+ MX7ULP_PAD_PTC8__PTC8 | MUX_PAD_CTRL(OTG_ID_GPIO_PAD_CTRL), /* gpio for OTG ID*/
+};
+
+static void setup_usb(void)
+{
+ mx7ulp_iomux_setup_multiple_pads(usb_otg1_pads,
+ ARRAY_SIZE(usb_otg1_pads));
+
+ gpio_request(IMX_GPIO_NR(3, 8), "otg_id");
+ gpio_direction_input(IMX_GPIO_NR(3, 8));
+}
+
+int board_ehci_usb_phy_mode(struct udevice *dev)
+{
+ int ret = 0;
+
+ if (dev_get_addr(dev) == USBOTG0_RBASE) {
+ ret = gpio_get_value(IMX_GPIO_NR(3, 8));
+
+ if (ret)
+ return USB_INIT_DEVICE;
+ else
+ return USB_INIT_HOST;
+ }
+
+ return USB_INIT_HOST;
+}
+#endif
+
int board_early_init_f(void)
{
setup_iomux_uart();
board_qspi_init();
#endif
+#ifdef CONFIG_DM_USB
+ setup_usb();
+#endif
+
return 0;
}
#define CONFIG_ENV_SIZE SZ_8K
#define CONFIG_CMD_FAT
-#define CONFIG_DOS_PARTITION
/* Using ULP WDOG for reset */
#define WDOG_BASE_ADDR WDG1_RBASE
#define QSPI0_AMBA_BASE 0xC0000000
#endif
+/* USB Configs */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_RTL8152
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+
#define CONFIG_OF_SYSTEM_SETUP
#endif /* __CONFIG_H */