<&clk IMX8MP_SYS_PLL1_800M>;
assigned-clock-rates = <0>, <500000000>, <200000000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- blk-ctl = <&mediamix_blk_ctl>;
+ blk-ctl = <&media_blk_ctrl>;
power-domains = <&mediamix_pd>;
status = "disabled";
};
};
- mediamix_blk_ctl: blk-ctl@32ec0000 {
- compatible = "fsl,imx8mp-mediamix-blk-ctl",
- "syscon";
+ media_blk_ctrl: media-blk-ctrl@32ec0000 {
+ compatible = "fsl,imx8mp-media-blk-ctrl", "syscon";
reg = <0x32ec0000 0x10000>;
- clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
+ power-domains = <&mediamix_pd>;
+
+ #clock-cells = <1>;
+ #reset-cells = <1>;
};
ldb: ldb@32ec005c {
clock-names = "ldb";
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
- gpr = <&mediamix_blk_ctl>;
+ gpr = <&media_blk_ctrl>;
power-domains = <&mediamix_pd>;
status = "disabled";
compatible = "fsl,imx8mp-lvds-phy";
#address-cells = <1>;
#size-cells = <0>;
- gpr = <&mediamix_blk_ctl>;
+ gpr = <&media_blk_ctrl>;
clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
clock-names = "apb";
status = "disabled";