MLK-18605-5 drm/bridge: sec-dsim: correct 'DSIM_FIFOCTRL' offset

According to the DSIM specification, the 'DSIM_FIFOCTRL'
register addr offset should be '0x4c' instead of '0x48'.
So correct it.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 31850816f3aea109aff6c4bbcb44221e7d74afb5)
(cherry picked from commit 0d6537496801653f4aad63fce9a30f94453c6c10)

diff --git a/drivers/gpu/drm/bridge/sec-dsim.c b/drivers/gpu/drm/bridge/sec-dsim.c
index 006e164..ad00ce1 100644 (file)
--- a/drivers/gpu/drm/bridge/sec-dsim.c
+++ b/drivers/gpu/drm/bridge/sec-dsim.c
@@ -52,7 +52,7 @@
 #define DSIM_PAYLOAD                   0x40
 #define DSIM_RXFIFO                    0x44
 #define DSIM_FIFOTHLD                  0x48
-#define DSIM_FIFOCTRL                  0x48
+#define DSIM_FIFOCTRL                  0x4c
 #define DSIM_MEMACCHR                  0x50
 #define DSIM_MULTI_PKT                 0x78