ARM: dts: imx27: Place the usb phy nodes in the board dts files
authorFabio Estevam <fabio.estevam@freescale.com>
Wed, 16 Apr 2014 17:53:19 +0000 (14:53 -0300)
committerShawn Guo <shawn.guo@freescale.com>
Fri, 16 May 2014 15:02:00 +0000 (23:02 +0800)
It is not a good approach to have the USB PHY nodes inside imx27.dtsi since
the USB PHYs on mx27 are not internal to the SoC.

Place the USB PHY nodes in the board dts files instead.

Also, each board may have a different clock source for the USB PHY, so do not
hardcode it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
arch/arm/boot/dts/imx27.dtsi

index 8b4181b..0875327 100644 (file)
                        };
                };
        };
+
+       usbphy {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               usbphy2: usbphy@2 {
+                       compatible = "usb-nop-xceiv";
+                       reg = <0>;
+                       vcc-supply = <&reg_5v0>;
+                       clocks = <&clks 0>;
+                       clock-names = "main_clk";
+               };
+       };
 };
 
 &cspi1 {
        dr_mode = "host";
        phy_type = "ulpi";
        vbus-supply = <&reg_5v0>;
+       fsl,usbphy = <&usbphy2>;
        disable-over-current;
        status = "okay";
 };
 
-&usbphy2 {
-       vcc-supply = <&reg_5v0>;
-};
-
 &weim {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_weim>;
index 33c5dc2..32cc7da 100644 (file)
                        regulator-max-microvolt = <5000000>;
                };
        };
+
+       usbphy {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               usbphy0: usbphy@0 {
+                       compatible = "usb-nop-xceiv";
+                       reg = <0>;
+                       vcc-supply = <&sw3_reg>;
+                       clocks = <&clks 0>;
+                       clock-names = "main_clk";
+               };
+       };
 };
 
 &audmux {
        pinctrl-0 = <&pinctrl_usbotg>;
        dr_mode = "otg";
        phy_type = "ulpi";
+       fsl,usbphy = <&usbphy0>;
        vbus-supply = <&sw3_reg>;
        status = "okay";
 };
 
-&usbphy0 {
-       vcc-supply = <&sw3_reg>;
-};
-
 &weim {
        status = "okay";
 
index 948354e..b2c103e 100644 (file)
                };
        };
 
-       usbphy {
-               compatible = "simple-bus";
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               usbphy0: usbphy@0 {
-                       compatible = "usb-nop-xceiv";
-                       reg = <0>;
-                       clocks = <&clks 75>;
-                       clock-names = "main_clk";
-               };
-
-               usbphy2: usbphy@2 {
-                       compatible = "usb-nop-xceiv";
-                       reg = <2>;
-                       clocks = <&clks 75>;
-                       clock-names = "main_clk";
-               };
-       };
-
        soc {
                #address-cells = <1>;
                #size-cells = <1>;
                                interrupts = <56>;
                                clocks = <&clks 75>;
                                fsl,usbmisc = <&usbmisc 0>;
-                               fsl,usbphy = <&usbphy0>;
                                status = "disabled";
                        };
 
                                interrupts = <55>;
                                clocks = <&clks 75>;
                                fsl,usbmisc = <&usbmisc 2>;
-                               fsl,usbphy = <&usbphy2>;
                                status = "disabled";
                        };