RDMA/bnxt_re: Add chip context to identify 57500 series
authorDevesh Sharma <devesh.sharma@broadcom.com>
Thu, 7 Feb 2019 06:31:22 +0000 (01:31 -0500)
committerJason Gunthorpe <jgg@mellanox.com>
Thu, 7 Feb 2019 20:24:48 +0000 (13:24 -0700)
Adding setup and destroy routines for chip-context. The chip context would
be used frequently in control and data path to take execution flow
depending on the chip type.  chip context structure pointer is added to
the relevant data structures.

Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com>
Signed-off-by: Devesh Sharma <devesh.sharma@broadcom.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
drivers/infiniband/hw/bnxt_re/bnxt_re.h
drivers/infiniband/hw/bnxt_re/main.c
drivers/infiniband/hw/bnxt_re/qplib_fp.h
drivers/infiniband/hw/bnxt_re/qplib_rcfw.h
drivers/infiniband/hw/bnxt_re/qplib_res.h

index 31baa89..e55a166 100644 (file)
@@ -124,6 +124,7 @@ struct bnxt_re_dev {
 #define BNXT_RE_FLAG_ISSUE_ROCE_STATS          29
        struct net_device               *netdev;
        unsigned int                    version, major, minor;
+       struct bnxt_qplib_chip_ctx      chip_ctx;
        struct bnxt_en_dev              *en_dev;
        struct bnxt_msix_entry          msix_entries[BNXT_RE_MAX_MSIX];
        int                             num_msix;
index 0877750..60b5c48 100644 (file)
@@ -80,6 +80,29 @@ static DEFINE_MUTEX(bnxt_re_dev_lock);
 static struct workqueue_struct *bnxt_re_wq;
 static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev);
 
+static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev)
+{
+       rdev->rcfw.res = NULL;
+       rdev->qplib_res.cctx = NULL;
+}
+
+static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev)
+{
+       struct bnxt_en_dev *en_dev;
+       struct bnxt *bp;
+
+       en_dev = rdev->en_dev;
+       bp = netdev_priv(en_dev->net);
+
+       rdev->chip_ctx.chip_num = bp->chip_num;
+       /* rest members to follow eventually */
+
+       rdev->qplib_res.cctx = &rdev->chip_ctx;
+       rdev->rcfw.res = &rdev->qplib_res;
+
+       return 0;
+}
+
 /* SR-IOV helper functions */
 
 static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev)
@@ -278,6 +301,7 @@ static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev)
 
        rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP,
                                                  &bnxt_re_ulp_ops, rdev);
+       rdev->qplib_res.pdev = rdev->en_dev->pdev;
        return rc;
 }
 
@@ -905,6 +929,7 @@ static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev)
        int i;
 
        for (i = 0; i < rdev->num_msix - 1; i++) {
+               rdev->nq[i].res = NULL;
                bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id);
                bnxt_qplib_free_nq(&rdev->nq[i]);
        }
@@ -949,6 +974,7 @@ static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
                goto dealloc_res;
 
        for (i = 0; i < rdev->num_msix - 1; i++) {
+               rdev->nq[i].res = &rdev->qplib_res;
                rdev->nq[i].hwq.max_elements = BNXT_RE_MAX_CQ_COUNT +
                        BNXT_RE_MAX_SRQC_COUNT + 2;
                rc = bnxt_qplib_alloc_nq(rdev->en_dev->pdev, &rdev->nq[i]);
@@ -1262,6 +1288,8 @@ static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev)
                        dev_warn(rdev_to_dev(rdev),
                                 "Failed to free MSI-X vectors: %#x", rc);
        }
+
+       bnxt_re_destroy_chip_ctx(rdev);
        if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) {
                rc = bnxt_re_unregister_netdev(rdev);
                if (rc)
@@ -1299,6 +1327,12 @@ static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev)
        }
        set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
 
+       rc = bnxt_re_setup_chip_ctx(rdev);
+       if (rc) {
+               dev_err(rdev_to_dev(rdev), "Failed to get chip context\n");
+               return -EINVAL;
+       }
+
        /* Check whether VF or PF */
        bnxt_re_get_sriov_func_type(rdev);
 
index 72352ca..f317bae 100644 (file)
@@ -439,6 +439,7 @@ struct bnxt_qplib_cq {
 
 struct bnxt_qplib_nq {
        struct pci_dev          *pdev;
+       struct bnxt_qplib_res   *res;
 
        int                     vector;
        cpumask_t               mask;
index be0ef0e..8011d67 100644 (file)
@@ -187,6 +187,7 @@ struct bnxt_qplib_qp_node {
 /* RCFW Communication Channels */
 struct bnxt_qplib_rcfw {
        struct pci_dev          *pdev;
+       struct bnxt_qplib_res   *res;
        int                     vector;
        struct tasklet_struct   worker;
        bool                    requested;
index 1e80aa7..6a0c458 100644 (file)
@@ -180,12 +180,20 @@ struct bnxt_qplib_ctx {
        u64                             hwrm_intf_ver;
 };
 
+struct bnxt_qplib_chip_ctx {
+       u16     chip_num;
+       u8      chip_rev;
+       u8      chip_metal;
+};
+
+#define CHIP_NUM_57500          0x1750
+
 struct bnxt_qplib_res {
        struct pci_dev                  *pdev;
+       struct bnxt_qplib_chip_ctx      *cctx;
        struct net_device               *netdev;
 
        struct bnxt_qplib_rcfw          *rcfw;
-
        struct bnxt_qplib_pd_tbl        pd_tbl;
        struct bnxt_qplib_sgid_tbl      sgid_tbl;
        struct bnxt_qplib_pkey_tbl      pkey_tbl;
@@ -193,6 +201,11 @@ struct bnxt_qplib_res {
        bool                            prio;
 };
 
+static inline bool bnxt_qplib_is_chip_gen_p5(struct bnxt_qplib_chip_ctx *cctx)
+{
+       return (cctx->chip_num == CHIP_NUM_57500);
+}
+
 #define to_bnxt_qplib(ptr, type, member)       \
        container_of(ptr, type, member)