MLK-12732: ARM: imx: imx6q: lppdr2 fix wrong timings for lower freq operation

On low frequency operation (freq <= 100Mhz) set self-refresh exit
to next valid command delay to 23 clock cycles (MMDC_MCFG0[tXS] = 0x16)

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
(cherry-picked from commit b480c0a99fe722017e1ad04c1de16739c1467e0a)

diff --git a/arch/arm/mach-imx/lpddr2_freq_imx6q.S b/arch/arm/mach-imx/lpddr2_freq_imx6q.S
index 1eb83a4..3eede66 100644 (file)
--- a/arch/arm/mach-imx/lpddr2_freq_imx6q.S
+++ b/arch/arm/mach-imx/lpddr2_freq_imx6q.S
@@ -236,7 +236,7 @@ wait_div_update2:
        str     r6, [r8, #0x18]
 
        /* Adjust LPDDR2 timings for 24Mhz operation */
-       ldr     r5, =0x03032073
+       ldr     r5, =0x03162073
        str     r5, [r8, #0xC]          /* MMDC0_MDCFG0 */
        ldr     r7, =0x00020482
        str     r7, [r8, #0x10]         /* MMDC0_MDCFG1 */