MLK-16804-03 driver: clk: Add video pll2 output gate clk on imx8mq

The Video PLL2 has a output enable bit to do clk gate,
So we need to register this gate to save power.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>

diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index 33fdd5e..a10b76d 100644 (file)
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -399,6 +399,7 @@ static void __init imx8mq_clocks_init(struct device_node *ccm_node)
        clks[IMX8MQ_SYS2_PLL_OUT] = imx_clk_gate("sys2_pll_out", "sys2_pll2_out", base + 0x3c, 9);
        clks[IMX8MQ_SYS3_PLL_OUT] = imx_clk_gate("sys3_pll_out", "sys3_pll2_out", base + 0x48, 9);
        clks[IMX8MQ_DRAM_PLL_OUT] = imx_clk_gate("dram_pll_out", "dram_pll2_out", base + 0x60, 9);
+       clks[IMX8MQ_VIDEO2_PLL_OUT] = imx_clk_gate("video2_pll_out", "video2_pll2_out", base + 0x54, 9);
 
        /* SYS PLL fixed output */
        clks[IMX8MQ_SYS1_PLL_40M] = imx_clk_fixed_factor("sys1_pll_40m", "sys1_pll_out", 1, 20);

diff --git a/include/dt-bindings/clock/imx8mq-clock.h b/include/dt-bindings/clock/imx8mq-clock.h
index 68b8e8f..7726725 100644 (file)
--- a/include/dt-bindings/clock/imx8mq-clock.h
+++ b/include/dt-bindings/clock/imx8mq-clock.h
@@ -619,6 +619,7 @@
 #define IMX8MQ_CLK_DRAM_CORE                   481
 
 #define IMX8MQ_CLK_MU_ROOT                     482
+#define IMX8MQ_VIDEO2_PLL_OUT                  483
 
-#define IMX8MQ_CLK_END                         483
+#define IMX8MQ_CLK_END                         484
 #endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */