ARM: dts: Add SPI support.

Signed-off-by: Josep Orga <jorga@somdevices.com>

diff --git a/arch/arm/boot/dts/imx6ull-somdevices-C8P1.dts b/arch/arm/boot/dts/imx6ull-somdevices-C8P1.dts
index d88d045..394cb0e 100644 (file)
--- a/arch/arm/boot/dts/imx6ull-somdevices-C8P1.dts
+++ b/arch/arm/boot/dts/imx6ull-somdevices-C8P1.dts
@@ -1 +1,3 @@
+#define MMC_SPI
+
 #include "imx6ull-somdevices.dtsi"

diff --git a/arch/arm/boot/dts/imx6ull-somdevices.dtsi b/arch/arm/boot/dts/imx6ull-somdevices.dtsi
index b83baea..ca96862 100644 (file)
--- a/arch/arm/boot/dts/imx6ull-somdevices.dtsi
+++ b/arch/arm/boot/dts/imx6ull-somdevices.dtsi
@@ -6,6 +6,7 @@
  * published by the Free Software Foundation.
  */
 /* #define DUAL_ETH */
+/* #define MMC_SPI */
 /dts-v1/;
 
 #include <dt-bindings/input/input.h>
@@ -257,6 +258,28 @@
        };
 };
 
+&ecspi2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi2>;
+       fsl,spi-num-chipselects = <1>;
+       cs-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+#ifndef MMC_SPI
+       spidev0: spi@0 {
+               compatible = "spidev";
+               reg = <0>;
+               spi-max-frequency = <60000000>;
+       };
+#else
+       mmc-slot@3{
+               compatible = "mmc-spi-slot";
+               spi-max-frequency = <50000000>;
+               voltage-ranges = <3300 3300>;
+               reg = <0>;
+       };
+#endif
+};
+
 &iomuxc {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_hog_1>;
@@ -532,6 +555,15 @@
                        MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
                >;
        };
+
+       pinctrl_ecspi2: ecspi2grp {
+               fsl,pins = <
+                       MX6UL_PAD_UART5_TX_DATA__ECSPI2_MOSI    0x0b0b0 /* CSPI_MOSI */
+                       MX6UL_PAD_UART5_RX_DATA__ECSPI2_MISO    0x0b0b0 /* CSPI_MISO */
+                       MX6UL_PAD_UART4_TX_DATA__ECSPI2_SCLK    0x0b0b0 /* CSPI_SCLK */
+                       MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29     0x0b0b0         /* CSPI_SS */
+               >;
+       };
 };
 
 &iomuxc_snvs {