MLK-24012-10 arm: dts: add imx6 pcie ep support

Add the PCIe EP mode on iMX6QP/Q/DL sabresd platforms.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bcb0867..c7b9552 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -474,6 +474,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
        imx6dl-sabresd-btwifi.dtb \
        imx6dl-sabresd-hdcp.dtb \
        imx6dl-sabresd-enetirq.dtb \
+       imx6dl-sabresd-pcie-ep.dtb \
        imx6dl-savageboard.dtb \
        imx6dl-ts4900.dtb \
        imx6dl-ts7970.dtb \
@@ -574,6 +575,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
        imx6q-sabresd-hdcp.dtb \
        imx6q-sabresd-uart.dtb \
        imx6q-sabresd-enetirq.dtb \
+       imx6q-sabresd-pcie-ep.dtb \
        imx6q-savageboard.dtb \
        imx6q-sbc6x.dtb \
        imx6q-tbs2910.dtb \
@@ -606,6 +608,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
        imx6qp-sabresd-ldo.dtb \
        imx6qp-sabresd-btwifi.dtb \
        imx6qp-sabresd-hdcp.dtb \
+       imx6qp-sabresd-pcie-ep.dtb \
        imx6qp-tx6qp-8037.dtb \
        imx6qp-tx6qp-8037-mb7.dtb \
        imx6qp-tx6qp-8137.dtb \

diff --git a/arch/arm/boot/dts/imx6dl-sabresd-pcie-ep.dts b/arch/arm/boot/dts/imx6dl-sabresd-pcie-ep.dts
new file mode 100644 (file)
index 0000000..002989a
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-sabresd-pcie-ep.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ */
+
+/dts-v1/;
+
+#include "imx6dl-sabresd.dts"
+
+&pcie{
+       status = "disabled";
+};
+
+&pcie_ep{
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/imx6q-sabresd-pcie-ep.dts b/arch/arm/boot/dts/imx6q-sabresd-pcie-ep.dts
new file mode 100644 (file)
index 0000000..534a77c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-sabresd-pcie-ep.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ */
+
+/dts-v1/;
+
+#include "imx6q-sabresd.dts"
+
+&pcie{
+       status = "disabled";
+};
+
+&pcie_ep{
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index d1ab854..eda6d36 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -342,6 +342,20 @@
                        status = "disabled";
                };
 
+               pcie_ep: pcie_ep@1ffc000 {
+                       compatible = "fsl,imx6q-pcie-ep";
+                       reg = <0x01ffc000 0x04000>, <0x01000000 0xf00000>;
+                       reg-names = "regs", "addr_space";
+                       num-lanes = <1>;
+                       clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,
+                                <&clks IMX6QDL_CLK_LVDS1_GATE>,
+                                <&clks IMX6QDL_CLK_PCIE_REF_125M>;
+                       clock-names = "pcie", "pcie_bus", "pcie_phy";
+                       num-ib-windows = <4>;
+                       num-ob-windows = <4>;
+                       status = "disabled";
+               };
+
                bus@2000000 { /* AIPS1 */
                        compatible = "fsl,aips-bus", "simple-bus";
                        #address-cells = <1>;

diff --git a/arch/arm/boot/dts/imx6qp-sabresd-pcie-ep.dts b/arch/arm/boot/dts/imx6qp-sabresd-pcie-ep.dts
new file mode 100644 (file)
index 0000000..9f59ff9
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qp-sabresd-pcie-ep.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ */
+
+/dts-v1/;
+
+#include "imx6qp-sabresd.dts"
+
+&pcie{
+       status = "disabled";
+};
+
+&pcie_ep{
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi
index 923d8ad..02eded2 100644 (file)
--- a/arch/arm/boot/dts/imx6qp.dtsi
+++ b/arch/arm/boot/dts/imx6qp.dtsi
@@ -139,3 +139,7 @@
 &pcie {
        compatible = "fsl,imx6qp-pcie", "snps,dw-pcie";
 };
+
+&pcie_ep {
+       compatible = "fsl,imx6qp-pcie-ep";
+};