During stress test of LPSR using RTC alarm, sometimes
RTC alarm fail to fire, the control register(offset 0x38)
is changed and RTC alarm is disabled, according to
design team, when enter LPSR with programming SNVS
to shutdown PMIC, SNVS need some time to finish power
down process, better to put ARM into wfi during this
window.
Signed-off-by: Anson Huang <b20788@freescale.com>
orr r7, r7, #0x60
str r7, [r11, #0x38]
wait_shutdown:
+ wfi
+ nop
+ nop
+ nop
+ nop
b wait_shutdown
ddr_only_self_refresh: