Enable DisplayPort in imx8qm lpddr4 validation board.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
imx8qm-mek-ca72.dtb imx8qm-lpddr4-val-ca53.dtb \
imx8qm-lpddr4-val-ca72.dtb imx8qm-ddr4-val.dtb \
imx8qm-lpddr4-val-lpspi.dtb imx8qm-lpddr4-val-lpspi-slave.dtb \
- imx8qm-mek-dsi-rm67191.dtb \
+ imx8qm-mek-dsi-rm67191.dtb imx8qm-lpddr4-val-dp.dtb\
imx8qp-lpddr4-val.dtb imx8dm-lpddr4-val.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek-dom0.dtb imx8qm-mek-domu.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+/*
+ * DP only dts, disable ldb display.
+ */
+#include "imx8qm-lpddr4-val.dts"
+
+/ {
+ sound-hdmi {
+ compatible = "fsl,imx-audio-cdnhdmi";
+ model = "imx-audio-dp";
+ audio-cpu = <&sai5>;
+ hdmi-out;
+ };
+};
+
+&sai5 {
+ status = "okay";
+};
+
+&sai5_lpcg {
+ status = "okay";
+};
+
+&ldb1_phy {
+ status = "disabled";
+};
+
+&ldb1 {
+ status = "disabled";
+};
+
+&i2c1_lvds0 {
+ status = "disabled";
+};
+
+&irqsteer_hdmi {
+ status = "okay";
+};
+
+&hdmi_lpcg_i2c0 {
+ status = "okay";
+};
+
+&hdmi_lpcg_lis_ipg {
+ status = "okay";
+};
+
+&hdmi_lpcg_pwm_ipg {
+ status = "okay";
+};
+
+&hdmi_lpcg_i2s {
+ status = "okay";
+};
+
+&hdmi_lpcg_gpio_ipg {
+ status = "okay";
+};
+
+&hdmi_lpcg_msi_hclk {
+ status = "okay";
+};
+
+&hdmi_lpcg_pxl {
+ status = "okay";
+};
+
+&hdmi_lpcg_phy {
+ status = "okay";
+};
+
+&hdmi_lpcg_apb_mux_csr {
+ status = "okay";
+};
+
+&hdmi_lpcg_apb_mux_ctrl {
+ status = "okay";
+};
+
+&hdmi_lpcg_apb {
+ status = "okay";
+};
+
+&hdmi {
+ compatible = "cdn,imx8qm-dp";
+ lane-mapping = <0x1b>;
+ status = "okay";
+};
+
+&spdif1 {
+ status = "okay";
+};
+
+&spdif1_lpcg {
+ status = "okay";
+};