interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x30700000 0x10000>;
- clocks = <&clks IMX7D_CLK_DUMMY>;
- clock-names = "pxp-axi";
+ clocks = <&clks IMX7D_PXP_IPG_CLK>, <&clks IMX7D_PXP_AXI_CLK>;
+ clock-names = "pxp_ipg", "pxp-axi";
status = "disabled";
};
struct pxps {
struct platform_device *pdev;
- struct clk *clk;
+ struct clk *ipg_clk;
+ struct clk *axi_clk;
void __iomem *base;
int irq; /* PXP IRQ to the CPU */
pm_runtime_get_sync(pxp->dev);
- clk_prepare_enable(pxp->clk);
+ clk_prepare_enable(pxp->ipg_clk);
+ clk_prepare_enable(pxp->axi_clk);
pxp->clk_stat = CLK_STAT_ON;
mutex_unlock(&pxp->clk_mutex);
spin_lock_irqsave(&pxp->lock, flags);
if ((pxp->pxp_ongoing == 0) && list_empty(&head)) {
spin_unlock_irqrestore(&pxp->lock, flags);
- clk_disable_unprepare(pxp->clk);
+ clk_disable_unprepare(pxp->ipg_clk);
+ clk_disable_unprepare(pxp->axi_clk);
pxp->clk_stat = CLK_STAT_OFF;
} else
spin_unlock_irqrestore(&pxp->lock, flags);
pxp->pdev = pdev;
- pxp->clk = devm_clk_get(&pdev->dev, "pxp-axi");
+ pxp->ipg_clk = devm_clk_get(&pdev->dev, "pxp_ipg");
+ pxp->axi_clk = devm_clk_get(&pdev->dev, "pxp_axi");
+
+ if (IS_ERR(pxp->ipg_clk) || IS_ERR(pxp->axi_clk)) {
+ dev_err(&pdev->dev, "pxp clocks invalid\n");
+ err = -EINVAL;
+ goto exit;
+ }
err = devm_request_irq(&pdev->dev, pxp->irq, pxp_irq, 0,
"pxp-dmaengine", pxp);
unregister_pxp_device();
cancel_work_sync(&pxp->work);
del_timer_sync(&pxp->clk_timer);
- clk_disable_unprepare(pxp->clk);
+ clk_disable_unprepare(pxp->ipg_clk);
+ clk_disable_unprepare(pxp->axi_clk);
device_remove_file(&pdev->dev, &dev_attr_clk_off_timeout);
device_remove_file(&pdev->dev, &dev_attr_block_size);
dma_async_device_unregister(&(pxp->pxp_dma.dma));