MLK-19526-1 imx8mq: Add CPU ID for iMX8MD and iMX8MQLite

iMX8MQ has two variant versions: iMX8MD and iMX8MQLite. Add dummy CPU ID
for these two, and check the fuses to get correct versions.

Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 58b77b541311d4b1d7db787cc769a7ad23ecbc79)

diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h
index 0f4ac9d..fc4a53f 100644 (file)
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -26,7 +26,9 @@
 #define MXC_CPU_MX7S           0x71 /* dummy ID */
 #define MXC_CPU_MX7D           0x72
 #define MXC_CPU_IMX8MQ         0x82
-#define MXC_CPU_IMX8MM         0x83 /* dummy ID */
+#define MXC_CPU_IMX8MD         0x83 /* dummy ID */
+#define MXC_CPU_IMX8MQL     0x84 /* dummy ID */
+#define MXC_CPU_IMX8MM         0x85 /* dummy ID */
 #define MXC_CPU_IMX8QXP_A0     0x90 /* dummy ID */
 #define MXC_CPU_IMX8QM         0x91 /* dummy ID */
 #define MXC_CPU_IMX8QXP                0x92 /* dummy ID */

diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
index ddeed8f..06e23eb 100644 (file)
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -43,7 +43,9 @@
 
 #define is_mx7ulp() (is_cpu_type(MXC_CPU_MX7ULP))
 
-#define is_imx8mq() (is_cpu_type(MXC_CPU_IMX8MQ))
+#define is_imx8mq() (is_cpu_type(MXC_CPU_IMX8MQ) || is_cpu_type(MXC_CPU_IMX8MD) || is_cpu_type(MXC_CPU_IMX8MQL))
+#define is_imx8md() (is_cpu_type(MXC_CPU_IMX8MD))
+#define is_imx8mql() (is_cpu_type(MXC_CPU_IMX8MQL))
 #define is_imx8mm() (is_cpu_type(MXC_CPU_IMX8MM))
 #define is_imx8qm() (is_cpu_type(MXC_CPU_IMX8QM))
 #define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))

diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index d7a2d21..9d19808 100644 (file)
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -153,6 +153,10 @@ const char *get_imx_type(u32 imxtype)
                return "8MM";   /* Quad-core version of the imx8mm */
        case MXC_CPU_IMX8MQ:
                return "8MQ";   /* Quad-core version of the imx8mq */
+       case MXC_CPU_IMX8MQL:
+               return "8MQLite";       /* Quad-core Lite version of the imx8mq */
+       case MXC_CPU_IMX8MD:
+               return "8MD";   /* Dual-core version of the imx8mq */
        case MXC_CPU_MX7S:
                return "7S";    /* Single-core version of the mx7 */
        case MXC_CPU_MX7D:

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 6618c02..9081bcd 100644 (file)
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -156,6 +156,25 @@ void enable_caches(void)
        dcache_enable();
 }
 
+static u32 get_cpu_variant_type(u32 type)
+{
+       if (type == MXC_CPU_IMX8MQ) {
+               struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+               struct fuse_bank *bank = &ocotp->bank[1];
+               struct fuse_bank1_regs *fuse =
+                       (struct fuse_bank1_regs *)bank->fuse_regs;
+
+               u32 value = readl(&fuse->tester4);
+
+               if ((value & 0x3) == 0x2)
+                       return MXC_CPU_IMX8MD;
+               else if (value & 0x200000)
+                       return MXC_CPU_IMX8MQL;
+       }
+
+       return type;
+}
+
 u32 get_cpu_rev(void)
 {
        struct anamix_pll *ana_pll = (struct anamix_pll *)ANATOP_BASE_ADDR;
@@ -168,7 +187,7 @@ u32 get_cpu_rev(void)
 
        /* iMX8MM */
         if (major_low == 0x41) {
-               return ((type + 1) << 12) | reg;
+               return (MXC_CPU_IMX8MM << 12) | reg;
        } else {
                /* iMX8MQ */
                if (reg == CHIP_REV_1_0) {
@@ -190,6 +209,8 @@ u32 get_cpu_rev(void)
                        }
                }
 
+               type = get_cpu_variant_type(type);
+
                return (type << 12) | reg;
        }
 }