imx7d-12x12-lpddr3-arm2 {
+ pinctrl_bt: btgrp-1 {
+ fsl,pins = <
+ MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x80000000 /* BT REG on */
+ >;
+ };
+
pinctrl_ecspi1_cs_1: ecspi1_cs_grp-1 {
fsl,pins = <
MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x2
MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x80000000
MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 0x80000000
MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x80000000
- MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x80000000 /* BT REG on */
MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x17059
MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x17059
MX7D_PAD_SD1_WP__GPIO5_IO1 0x17059
};
&uart1 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_uart1_1>;
+ pinctrl-1 = <&pinctrl_uart1_1>;
assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
status = "okay";
};
&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3_1>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_uart3_1
+ &pinctrl_bt>;
+ pinctrl-1 = <&pinctrl_uart3_1
+ &pinctrl_bt>;
fsl,uart-has-rtscts;
assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;