ARM: 8670/1: V7M: Do not corrupt vector table around v7m_invalidate_l1 call
authorVladimir Murzin <vladimir.murzin@arm.com>
Mon, 24 Apr 2017 09:40:48 +0000 (10:40 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 25 May 2017 13:44:44 +0000 (15:44 +0200)
commit 6d80594936914e798b1b54b3bfe4bd68d8418966 upstream.

We save/restore registers around v7m_invalidate_l1 to address pointed
by r12, which is vector table, so the first eight entries are
overwritten with a garbage. We already have stack setup at that stage,
so use it to save/restore register.

Fixes: 6a8146f420be ("ARM: 8609/1: V7M: Add support for the Cortex-M7 processor")
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/mm/proc-v7m.S

index 8dea616..5049777 100644 (file)
@@ -147,10 +147,10 @@ __v7m_setup_cont:
 
        @ Configure caches (if implemented)
        teq     r8, #0
-       stmneia r12, {r0-r6, lr}        @ v7m_invalidate_l1 touches r0-r6
+       stmneia sp, {r0-r6, lr}         @ v7m_invalidate_l1 touches r0-r6
        blne    v7m_invalidate_l1
        teq     r8, #0                  @ re-evalutae condition
-       ldmneia r12, {r0-r6, lr}
+       ldmneia sp, {r0-r6, lr}
 
        @ Configure the System Control Register to ensure 8-byte stack alignment
        @ Note the STKALIGN bit is either RW or RAO.