assigned-clock-rates = <0>, <0>, <0>, <0>, <24576000>;
};
+&dcic1 {
+ dcic_id = <0>;
+ dcic_mux = "dcic-hdmi";
+ status = "okay";
+};
+
+&dcic2 {
+ dcic_id = <1>;
+ dcic_mux = "dcic-lvds0";
+ status = "okay";
+};
+
&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio3 19 0>;
};
};
+&dcic1 {
+ dcic_id = <0>;
+ dcic_mux = "dcic-lcdif1";
+ status = "okay";
+};
+
+&dcic2 {
+ dcic_id = <1>;
+ dcic_mux = "dcic-lvds";
+ status = "okay";
+};
+
&vadc {
vadc_in = <0>;
csi_id = <1>;
};
};
+&dcic1 {
+ dcic_id = <0>;
+ dcic_mux = "dcic-lcdif1";
+ status = "okay";
+};
+
+&dcic2 {
+ dcic_id = <1>;
+ dcic_mux = "dcic-lvds";
+ status = "okay";
+};
+
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2>;
status = "disabled";
};
+ dcic1: dcic@0220c000 {
+ compatible = "fsl,imx6sx-dcic";
+ reg = <0x0220c000 0x4000>;
+ interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6SX_CLK_DCIC1>,
+ <&clks IMX6SX_CLK_DISPLAY_AXI>;
+ clock-names = "dcic", "disp-axi";
+ gpr = <&gpr>;
+ status = "disabled";
+ };
+
+ dcic2: dcic@02210000 {
+ compatible = "fsl,imx6sx-dcic";
+ reg = <0x02210000 0x4000>;
+ interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6SX_CLK_DCIC2>,
+ <&clks IMX6SX_CLK_DISPLAY_AXI>;
+ clock-names = "dcic", "disp-axi";
+ gpr = <&gpr>;
+ status = "disabled";
+ };
+
pxp: pxp@02218000 {
reg = <0x02218000 0x4000>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
CONFIG_FB_MXC_LDB=y
CONFIG_FB_MXC_HDMI=y
CONFIG_FB_MXS_SII902X=y
+CONFIG_FB_MXC_DCIC=m
CONFIG_HANNSTAR_CABC=y
CONFIG_FB_MXC_EINK_PANEL=y
CONFIG_FB_MXC_EINK_V2_PANEL=y
CONFIG_SND_IMX_SOC=y
CONFIG_SND_SOC_EUKREA_TLV320=y
CONFIG_SND_SOC_IMX_WM8960=y
+CONFIG_SND_SOC_IMX_SII902X=y
CONFIG_SND_SOC_IMX_WM8958=y
CONFIG_SND_SOC_IMX_CS42888=y
CONFIG_SND_SOC_IMX_WM8962=y
-CONFIG_SND_SOC_IMX_SII902X=y
CONFIG_SND_SOC_IMX_SGTL5000=y
CONFIG_SND_SOC_IMX_MQS=y
CONFIG_SND_SOC_IMX_SPDIF=y