MLK-14940-1 pinctrl: imx8qxp: correct pin name and id

Correct pin name and id.

Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/drivers/pinctrl/freescale/pinctrl-imx8qxp.c b/drivers/pinctrl/freescale/pinctrl-imx8qxp.c
index 9bd6ee0..0f1da1a 100644 (file)
--- a/drivers/pinctrl/freescale/pinctrl-imx8qxp.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx8qxp.c
@@ -28,9 +28,9 @@
 extern sc_ipc_t pinctrl_ipcHandle;
 
 static const struct pinctrl_pin_desc imx8qxp_pinctrl_pads[] = {
+       IMX_PINCTRL_PIN(SC_P_PCIE_CTRL0_PERST_B),
        IMX_PINCTRL_PIN(SC_P_PCIE_CTRL0_CLKREQ_B),
        IMX_PINCTRL_PIN(SC_P_PCIE_CTRL0_WAKE_B),
-       IMX_PINCTRL_PIN(SC_P_PCIE_CTRL0_PERST_B),
        IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_PCIESEP),
        IMX_PINCTRL_PIN(SC_P_USB_SS3_TC0),
        IMX_PINCTRL_PIN(SC_P_USB_SS3_TC1),
@@ -43,17 +43,20 @@ static const struct pinctrl_pin_desc imx8qxp_pinctrl_pads[] = {
        IMX_PINCTRL_PIN(SC_P_EMMC0_DATA1),
        IMX_PINCTRL_PIN(SC_P_EMMC0_DATA2),
        IMX_PINCTRL_PIN(SC_P_EMMC0_DATA3),
+       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_SD1FIX0),
        IMX_PINCTRL_PIN(SC_P_EMMC0_DATA4),
        IMX_PINCTRL_PIN(SC_P_EMMC0_DATA5),
        IMX_PINCTRL_PIN(SC_P_EMMC0_DATA6),
        IMX_PINCTRL_PIN(SC_P_EMMC0_DATA7),
        IMX_PINCTRL_PIN(SC_P_EMMC0_STROBE),
        IMX_PINCTRL_PIN(SC_P_EMMC0_RESET_B),
-       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_SD1FIX0),
+       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_SD1FIX1),
        IMX_PINCTRL_PIN(SC_P_USDHC1_RESET_B),
        IMX_PINCTRL_PIN(SC_P_USDHC1_VSELECT),
+       IMX_PINCTRL_PIN(SC_P_CTL_NAND_RE_P_N),
        IMX_PINCTRL_PIN(SC_P_USDHC1_WP),
        IMX_PINCTRL_PIN(SC_P_USDHC1_CD_B),
+       IMX_PINCTRL_PIN(SC_P_CTL_NAND_DQS_P_N),
        IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_VSELSEP),
        IMX_PINCTRL_PIN(SC_P_USDHC1_CLK),
        IMX_PINCTRL_PIN(SC_P_USDHC1_CMD),
@@ -68,41 +71,18 @@ static const struct pinctrl_pin_desc imx8qxp_pinctrl_pads[] = {
        IMX_PINCTRL_PIN(SC_P_ENET0_RGMII_TXD1),
        IMX_PINCTRL_PIN(SC_P_ENET0_RGMII_TXD2),
        IMX_PINCTRL_PIN(SC_P_ENET0_RGMII_TXD3),
+       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0),
        IMX_PINCTRL_PIN(SC_P_ENET0_RGMII_RXC),
        IMX_PINCTRL_PIN(SC_P_ENET0_RGMII_RX_CTL),
        IMX_PINCTRL_PIN(SC_P_ENET0_RGMII_RXD0),
        IMX_PINCTRL_PIN(SC_P_ENET0_RGMII_RXD1),
        IMX_PINCTRL_PIN(SC_P_ENET0_RGMII_RXD2),
        IMX_PINCTRL_PIN(SC_P_ENET0_RGMII_RXD3),
-       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0),
+       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1),
        IMX_PINCTRL_PIN(SC_P_ENET0_REFCLK_125M_25M),
        IMX_PINCTRL_PIN(SC_P_ENET0_MDIO),
        IMX_PINCTRL_PIN(SC_P_ENET0_MDC),
        IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_GPIOCT),
-       IMX_PINCTRL_PIN(SC_P_FLEXCAN0_RX),
-       IMX_PINCTRL_PIN(SC_P_FLEXCAN0_TX),
-       IMX_PINCTRL_PIN(SC_P_FLEXCAN1_RX),
-       IMX_PINCTRL_PIN(SC_P_FLEXCAN1_TX),
-       IMX_PINCTRL_PIN(SC_P_UART0_RX),
-       IMX_PINCTRL_PIN(SC_P_UART0_TX),
-       IMX_PINCTRL_PIN(SC_P_UART1_TX),
-       IMX_PINCTRL_PIN(SC_P_UART1_RX),
-       IMX_PINCTRL_PIN(SC_P_UART1_RTS_B),
-       IMX_PINCTRL_PIN(SC_P_UART1_CTS_B),
-       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_GPIOLH),
-       IMX_PINCTRL_PIN(SC_P_SPI0_SCK),
-       IMX_PINCTRL_PIN(SC_P_SPI0_SDO),
-       IMX_PINCTRL_PIN(SC_P_SPI0_SDI),
-       IMX_PINCTRL_PIN(SC_P_SPI0_CS0),
-       IMX_PINCTRL_PIN(SC_P_SPI0_CS1),
-       IMX_PINCTRL_PIN(SC_P_SPI2_SCK),
-       IMX_PINCTRL_PIN(SC_P_SPI2_SDO),
-       IMX_PINCTRL_PIN(SC_P_SPI2_SDI),
-       IMX_PINCTRL_PIN(SC_P_SPI2_CS0),
-       IMX_PINCTRL_PIN(SC_P_SAI1_RXC),
-       IMX_PINCTRL_PIN(SC_P_SAI1_RXD),
-       IMX_PINCTRL_PIN(SC_P_SAI1_RXFS),
-       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHT),
        IMX_PINCTRL_PIN(SC_P_ESAI0_FSR),
        IMX_PINCTRL_PIN(SC_P_ESAI0_FST),
        IMX_PINCTRL_PIN(SC_P_ESAI0_SCKR),
@@ -116,18 +96,74 @@ static const struct pinctrl_pin_desc imx8qxp_pinctrl_pads[] = {
        IMX_PINCTRL_PIN(SC_P_SPDIF0_RX),
        IMX_PINCTRL_PIN(SC_P_SPDIF0_TX),
        IMX_PINCTRL_PIN(SC_P_SPDIF0_EXT_CLK),
+       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHB),
        IMX_PINCTRL_PIN(SC_P_SPI3_SCK),
        IMX_PINCTRL_PIN(SC_P_SPI3_SDO),
        IMX_PINCTRL_PIN(SC_P_SPI3_SDI),
        IMX_PINCTRL_PIN(SC_P_SPI3_CS0),
        IMX_PINCTRL_PIN(SC_P_SPI3_CS1),
+       IMX_PINCTRL_PIN(SC_P_MCLK_IN1),
        IMX_PINCTRL_PIN(SC_P_MCLK_IN0),
        IMX_PINCTRL_PIN(SC_P_MCLK_OUT0),
-       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHB),
+       IMX_PINCTRL_PIN(SC_P_UART1_TX),
+       IMX_PINCTRL_PIN(SC_P_UART1_RX),
+       IMX_PINCTRL_PIN(SC_P_UART1_RTS_B),
+       IMX_PINCTRL_PIN(SC_P_UART1_CTS_B),
+       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHK),
+       IMX_PINCTRL_PIN(SC_P_SAI0_TXD),
+       IMX_PINCTRL_PIN(SC_P_SAI0_TXC),
+       IMX_PINCTRL_PIN(SC_P_SAI0_RXD),
+       IMX_PINCTRL_PIN(SC_P_SAI0_TXFS),
+       IMX_PINCTRL_PIN(SC_P_SAI1_RXD),
+       IMX_PINCTRL_PIN(SC_P_SAI1_RXC),
+       IMX_PINCTRL_PIN(SC_P_SAI1_RXFS),
+       IMX_PINCTRL_PIN(SC_P_SPI2_CS0),
+       IMX_PINCTRL_PIN(SC_P_SPI2_SDO),
+       IMX_PINCTRL_PIN(SC_P_SPI2_SDI),
+       IMX_PINCTRL_PIN(SC_P_SPI2_SCK),
+       IMX_PINCTRL_PIN(SC_P_SPI0_SCK),
+       IMX_PINCTRL_PIN(SC_P_SPI0_SDI),
+       IMX_PINCTRL_PIN(SC_P_SPI0_SDO),
+       IMX_PINCTRL_PIN(SC_P_SPI0_CS1),
+       IMX_PINCTRL_PIN(SC_P_SPI0_CS0),
+       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHT),
        IMX_PINCTRL_PIN(SC_P_ADC_IN1),
        IMX_PINCTRL_PIN(SC_P_ADC_IN0),
        IMX_PINCTRL_PIN(SC_P_ADC_IN3),
        IMX_PINCTRL_PIN(SC_P_ADC_IN2),
+       IMX_PINCTRL_PIN(SC_P_ADC_IN5),
+       IMX_PINCTRL_PIN(SC_P_ADC_IN4),
+       IMX_PINCTRL_PIN(SC_P_FLEXCAN0_RX),
+       IMX_PINCTRL_PIN(SC_P_FLEXCAN0_TX),
+       IMX_PINCTRL_PIN(SC_P_FLEXCAN1_RX),
+       IMX_PINCTRL_PIN(SC_P_FLEXCAN1_TX),
+       IMX_PINCTRL_PIN(SC_P_FLEXCAN2_RX),
+       IMX_PINCTRL_PIN(SC_P_FLEXCAN2_TX),
+       IMX_PINCTRL_PIN(SC_P_UART0_RX),
+       IMX_PINCTRL_PIN(SC_P_UART0_TX),
+       IMX_PINCTRL_PIN(SC_P_UART2_TX),
+       IMX_PINCTRL_PIN(SC_P_UART2_RX),
+       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_GPIOLH),
+       IMX_PINCTRL_PIN(SC_P_MIPI_DSI0_I2C0_SCL),
+       IMX_PINCTRL_PIN(SC_P_MIPI_DSI0_I2C0_SDA),
+       IMX_PINCTRL_PIN(SC_P_MIPI_DSI0_GPIO0_00),
+       IMX_PINCTRL_PIN(SC_P_MIPI_DSI0_GPIO0_01),
+       IMX_PINCTRL_PIN(SC_P_MIPI_DSI1_I2C0_SCL),
+       IMX_PINCTRL_PIN(SC_P_MIPI_DSI1_I2C0_SDA),
+       IMX_PINCTRL_PIN(SC_P_MIPI_DSI1_GPIO0_00),
+       IMX_PINCTRL_PIN(SC_P_MIPI_DSI1_GPIO0_01),
+       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGPIO),
+       IMX_PINCTRL_PIN(SC_P_JTAG_TRST_B),
+       IMX_PINCTRL_PIN(SC_P_PMIC_I2C_SCL),
+       IMX_PINCTRL_PIN(SC_P_PMIC_I2C_SDA),
+       IMX_PINCTRL_PIN(SC_P_PMIC_INT_B),
+       IMX_PINCTRL_PIN(SC_P_SCU_GPIO0_00),
+       IMX_PINCTRL_PIN(SC_P_SCU_GPIO0_01),
+       IMX_PINCTRL_PIN(SC_P_SCU_PMIC_STANDBY),
+       IMX_PINCTRL_PIN(SC_P_SCU_BOOT_MODE0),
+       IMX_PINCTRL_PIN(SC_P_SCU_BOOT_MODE1),
+       IMX_PINCTRL_PIN(SC_P_SCU_BOOT_MODE2),
+       IMX_PINCTRL_PIN(SC_P_SCU_BOOT_MODE3),
        IMX_PINCTRL_PIN(SC_P_CSI_D00),
        IMX_PINCTRL_PIN(SC_P_CSI_D01),
        IMX_PINCTRL_PIN(SC_P_CSI_D02),
@@ -143,29 +179,11 @@ static const struct pinctrl_pin_desc imx8qxp_pinctrl_pads[] = {
        IMX_PINCTRL_PIN(SC_P_CSI_EN),
        IMX_PINCTRL_PIN(SC_P_CSI_RESET),
        IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHD),
-       IMX_PINCTRL_PIN(SC_P_PMIC_I2C_SCL),
-       IMX_PINCTRL_PIN(SC_P_PMIC_I2C_SDA),
-       IMX_PINCTRL_PIN(SC_P_PMIC_INT_B),
-       IMX_PINCTRL_PIN(SC_P_SCU_GPIO0_00),
-       IMX_PINCTRL_PIN(SC_P_SCU_GPIO0_01),
-       IMX_PINCTRL_PIN(SC_P_SCU_BOOT_MODE0),
-       IMX_PINCTRL_PIN(SC_P_SCU_BOOT_MODE1),
-       IMX_PINCTRL_PIN(SC_P_SCU_BOOT_MODE2),
-       IMX_PINCTRL_PIN(SC_P_SCU_BOOT_MODE3),
-       IMX_PINCTRL_PIN(SC_P_MIPI_DSI0_I2C0_SCL),
-       IMX_PINCTRL_PIN(SC_P_MIPI_DSI0_I2C0_SDA),
-       IMX_PINCTRL_PIN(SC_P_MIPI_DSI0_GPIO0_00),
-       IMX_PINCTRL_PIN(SC_P_MIPI_DSI0_GPIO0_01),
-       IMX_PINCTRL_PIN(SC_P_MIPI_DSI1_I2C0_SCL),
-       IMX_PINCTRL_PIN(SC_P_MIPI_DSI1_I2C0_SDA),
-       IMX_PINCTRL_PIN(SC_P_MIPI_DSI1_GPIO0_00),
-       IMX_PINCTRL_PIN(SC_P_MIPI_DSI1_GPIO0_01),
-       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGPIO),
        IMX_PINCTRL_PIN(SC_P_MIPI_CSI0_MCLK_OUT),
        IMX_PINCTRL_PIN(SC_P_MIPI_CSI0_I2C0_SCL),
        IMX_PINCTRL_PIN(SC_P_MIPI_CSI0_I2C0_SDA),
-       IMX_PINCTRL_PIN(SC_P_MIPI_CSI0_GPIO0_00),
        IMX_PINCTRL_PIN(SC_P_MIPI_CSI0_GPIO0_01),
+       IMX_PINCTRL_PIN(SC_P_MIPI_CSI0_GPIO0_00),
        IMX_PINCTRL_PIN(SC_P_QSPI0A_DATA0),
        IMX_PINCTRL_PIN(SC_P_QSPI0A_DATA1),
        IMX_PINCTRL_PIN(SC_P_QSPI0A_DATA2),
@@ -174,6 +192,7 @@ static const struct pinctrl_pin_desc imx8qxp_pinctrl_pads[] = {
        IMX_PINCTRL_PIN(SC_P_QSPI0A_SS0_B),
        IMX_PINCTRL_PIN(SC_P_QSPI0A_SS1_B),
        IMX_PINCTRL_PIN(SC_P_QSPI0A_SCLK),
+       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_QSPI0A),
        IMX_PINCTRL_PIN(SC_P_QSPI0B_SCLK),
        IMX_PINCTRL_PIN(SC_P_QSPI0B_DATA0),
        IMX_PINCTRL_PIN(SC_P_QSPI0B_DATA1),
@@ -182,6 +201,7 @@ static const struct pinctrl_pin_desc imx8qxp_pinctrl_pads[] = {
        IMX_PINCTRL_PIN(SC_P_QSPI0B_DQS),
        IMX_PINCTRL_PIN(SC_P_QSPI0B_SS0_B),
        IMX_PINCTRL_PIN(SC_P_QSPI0B_SS1_B),
+       IMX_PINCTRL_PIN(SC_P_COMP_CTL_GPIO_1V8_3V3_QSPI0B),
 };
 
 static struct imx_pinctrl_soc_info imx8qxp_pinctrl_info = {