MLK-17200-1 mx7ulp: Add CPU revision check for B0

Since there is no register for CPU revision, we use ROM version to
check the A0 or B0 chip.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/cpu/armv7/mx7ulp/soc.c b/arch/arm/cpu/armv7/mx7ulp/soc.c
index 888aacc..587835e 100644 (file)
--- a/arch/arm/cpu/armv7/mx7ulp/soc.c
+++ b/arch/arm/cpu/armv7/mx7ulp/soc.c
@@ -22,10 +22,14 @@ struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
 };
 #endif
 
+#define ROM_VERSION_ADDR 0x80
 u32 get_cpu_rev(void)
 {
-       /* Temporally hard code the CPU rev to 0x73, rev 1.0. Fix it later */
-       return (MXC_CPU_MX7ULP << 12) | (1 << 4);
+       /* Check the ROM version for cpu revision */
+       uint32_t rom_version;
+       rom_version = readl((void __iomem *)ROM_VERSION_ADDR);
+
+       return (MXC_CPU_MX7ULP << 12) | (rom_version & 0xFF);
 }
 
 #ifdef CONFIG_REVISION_TAG