MLK-11459 ARM: imx: add uart clk parent from OSC support

when kernel command line has "uart_from_osc" defined, set uart1
parent clock to OSC for low power case.

Signed-off-by: Fugang Duan <B38611@freescale.com>

diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c
index 5fd4dda..9f7eb14 100644 (file)
--- a/drivers/clk/imx/clk-imx6sl.c
+++ b/drivers/clk/imx/clk-imx6sl.c
@@ -55,7 +55,7 @@ static const char *lcdif_pix_sels[]   = { "pll2_bus", "pll3_usb_otg", "pll5_video_
 static const char *epdc_pix_sels[]     = { "pll2_bus", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0", "pll2_pfd1", "pll3_pfd1", };
 static const char *audio_sels[]                = { "pll4_audio_div", "pll3_pfd2", "pll3_pfd3", "pll3_usb_otg", };
 static const char *ecspi_sels[]                = { "pll3_60m", "osc", };
-static const char *uart_sels[]         = { "pll3_80m", "osc", };
+static const char *uart_sels[]         = { "pll3_80m", "uart_osc_4m", };
 static const char *lvds_sels[]         = {
        "pll1_sys", "pll2_bus", "pll2_pfd0", "pll2_pfd1", "pll2_pfd2", "dummy", "pll4_audio", "pll5_video",
        "dummy", "enet_ref", "dummy", "dummy", "pll3_usb_otg", "pll7_usb_host", "pll3_pfd0", "pll3_pfd1",
@@ -288,6 +288,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
        clks[IMX6SL_CLK_PLL3_120M] = imx_clk_fixed_factor("pll3_120m", "pll3_usb_otg",   1, 4);
        clks[IMX6SL_CLK_PLL3_80M]  = imx_clk_fixed_factor("pll3_80m",  "pll3_usb_otg",   1, 6);
        clks[IMX6SL_CLK_PLL3_60M]  = imx_clk_fixed_factor("pll3_60m",  "pll3_usb_otg",   1, 8);
+       clks[IMX6SL_CLK_UART_OSC_4M] = imx_clk_fixed_factor("uart_osc_4m",  "osc",   1, 6);
 
        np = ccm_node;
        base = of_iomap(np, 0);
@@ -448,6 +449,11 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
        clk_set_parent(clks[IMX6SL_CLK_LCDIF_AXI_SEL],
                       clks[IMX6SL_CLK_PLL2_PFD2]);
 
+        /* Set the UART parent if needed */
+        if (uart_from_osc)
+               imx_clk_set_parent(clks[IMX6SL_CLK_UART_SEL], clks[IMX6SL_CLK_UART_OSC_4M]);
+
        imx_register_uart_clocks(uart_clks);
+
 }
 CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);

diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
index a0f2fe5..48f97cb 100644 (file)
--- a/drivers/clk/imx/clk-imx6sx.c
+++ b/drivers/clk/imx/clk-imx6sx.c
@@ -556,6 +556,12 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
        clk_set_parent(clks[IMX6SX_CLK_ESAI_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
        clk_set_rate(clks[IMX6SX_CLK_ESAI_PODF], 24576000);
 
+        /* Set the UART parent if needed. */
+        if (uart_from_osc)
+               clk_set_parent(clks[IMX6SX_CLK_UART_SEL], clks[IMX6SX_CLK_OSC]);
+        else
+               clk_set_parent(clks[IMX6SX_CLK_UART_SEL], clks[IMX6SX_CLK_PLL3_80M]);
+
        /* Set parent clock for vadc */
        clk_set_parent(clks[IMX6SX_CLK_VID_SEL], clks[IMX6SX_CLK_PLL3_USB_OTG]);
 

diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c
index d1d7787..30f6532 100644 (file)
--- a/drivers/clk/imx/clk-imx6ul.c
+++ b/drivers/clk/imx/clk-imx6ul.c
@@ -427,6 +427,12 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node)
        /* set perclk to from OSC */
        clk_set_parent(clks[IMX6UL_CLK_PERCLK_SEL], clks[IMX6UL_CLK_OSC]);
 
+        /* Set the UART parent if needed */
+        if (uart_from_osc)
+               imx_clk_set_parent(clks[IMX6UL_CLK_UART_SEL], clks[IMX6UL_CLK_OSC]);
+        else
+               imx_clk_set_parent(clks[IMX6UL_CLK_UART_SEL], clks[IMX6UL_CLK_PLL3_80M]);
+
        clk_set_rate(clks[IMX6UL_CLK_ENET_REF], 50000000);
        clk_set_rate(clks[IMX6UL_CLK_ENET2_REF], 50000000);
        clk_set_rate(clks[IMX6UL_CLK_CSI], 24000000);

diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
index a634b11..f76cb0b 100644 (file)
--- a/drivers/clk/imx/clk.c
+++ b/drivers/clk/imx/clk.c
@@ -7,6 +7,8 @@
 
 DEFINE_SPINLOCK(imx_ccm_lock);
 
+bool uart_from_osc;
+
 void __init imx_check_clocks(struct clk *clks[], unsigned int count)
 {
        unsigned i;
@@ -111,3 +113,11 @@ static int __init imx_clk_disable_uart(void)
        return 0;
 }
 late_initcall_sync(imx_clk_disable_uart);
+
+static int __init setup_uart_clk(char *uart_rate)
+{
+       uart_from_osc = true;
+       return 1;
+}
+__setup("uart_from_osc", setup_uart_clk);
+

diff --git a/include/dt-bindings/clock/imx6sl-clock.h b/include/dt-bindings/clock/imx6sl-clock.h
index e14573e..6bc731e 100644 (file)
--- a/include/dt-bindings/clock/imx6sl-clock.h
+++ b/include/dt-bindings/clock/imx6sl-clock.h
@@ -175,6 +175,7 @@
 #define IMX6SL_CLK_SSI2_IPG            162
 #define IMX6SL_CLK_SSI3_IPG            163
 #define IMX6SL_CLK_SPDIF_GCLK          164
-#define IMX6SL_CLK_END                 165
+#define IMX6SL_CLK_UART_OSC_4M         165
+#define IMX6SL_CLK_END                 166
 
 #endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */